Hello Felipe, On 17/06/15 21:31, ext Felipe Balbi wrote: > With this patch we try to be as close to 50% > duty cycle as possible. The reason for this > is that some devices present an erratic behavior > with certain duty cycles. > > One such example is TPS65218 PMIC which fails > to change voltages when running @ 400kHz and > duty cycle is lower than 34%. > > The idea of the patch is simple: > > calculate desired scl_period from requested scl > and use 50% for tLow and 50% for tHigh. > > tLow is calculated with a DIV_ROUND_UP() to make > sure it's slightly higher than tHigh and to make > sure that we end up within I2C specifications. if you refuse to change the calculations to achieve maximum possible bus rate (as I've shown you with SCLL=9 and SCLH=9), maybe you want to change the description? Because you are doing something else than is written here. You are only in spec because you are not doing 50% duty cycle. And you didn't mention here that you lower the bus speed below 400kHz to achieve this. -- Best regards, Alexander Sverdlin. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
