On 5.04.2015 07:13, Matthijs van Duin wrote:
I would actually suggest clearing IBE if it set on Cortex-A8 r2 or later processors and a secure monitor call is available to do so (there is on the DM814x and AM335x, dunno about the 37xx), also for performance reasons: BTB invalidates are quite expensive instructions (when enabled).
There is (or should be) SM call, it is explained in 36xx TRM(SWPU177AA) as well, 26.4.1, "Booting Overview". Though I wonder why SMC is needed to write ACR on non-HS devices. A simple MRC should suffice, unless I miss something.
Clearing the IBE bit on devices that don't need erratum 430973 workaround, along with enabling that workaround in kernel is the best approach IMO. That way we will gain both stability on cores that need the workaround (like on N900 and the other devices with p1) and won't lose performance on cores that are not affected.
Matthijs
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