On Sun, Jan 18, 2015 at 09:52:14AM +0000, Lee Jones wrote: > On Fri, 26 Dec 2014, Felipe Balbi wrote: > > > STATUS register can be modified by the HW, so we > > should bypass cache because of that. > > > > In the case of INT[12] registers, they are the ones > > that actually clear the IRQ source at the time they > > are read. If we rely on the cache for them, we will > > never be able to clear the interrupt, which will cause > > our IRQ line to be disabled due to IRQ throttling. > > > > Fixes: 44b4dc6 mfd: tps65218: Add driver for the TPS65218 PMIC > > Cc: <stable@xxxxxxxxxxxxxxx> # v3.15+ > > Cc: Keerthy <j-keerthy@xxxxxx> > > Cc: Lee Jones <lee.jones@xxxxxxxxxx> > > Signed-off-by: Felipe Balbi <balbi@xxxxxx> > > --- > > drivers/mfd/tps65218.c | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > Sorry for the delay. It's difficult to get a WiFi signal 2000m up in > an Austrian mountain. :) now you're just making excuses ;-) > Applied now, thanks. thanks :-) -- balbi
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