On Tue, Oct 21, 2014 at 11:43 AM, Nishanth Menon <nm@xxxxxx> wrote:
> Roger,
>
> On 10/21/2014 05:41 AM, Roger Quadros wrote:
>> DRA72-evm has a 256MB 16-bit wide NAND chip. Add
>> pinmux and NAND node.
>>
>> The NAND chips 'Chip select' and 'Write protect' can be
>> controlled using DIP Switch SW5. To use NAND,
>> the switch must be configured like so:
>>
>> SW5.1 (NAND_SELn) = ON (LOW)
>> SW5.9 (GPMC_WPN) = OFF (HIGH)
>
> Could we move this description to the dts as a comment? it would be
> little more easier to refer to than figuring it out from git log. I
> recollect trying to figure this out while attempting to test out NAND
> previously, never actually thought to check in git log. just a
> suggestion..
[...]
>> +&gpmc {
>> + status = "okay";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&nand_default>;
>> + ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
>> + nand@0,0 {
>> + /* To use NAND, DIP switch SW5 must be set like so:
>> + * SW5.1 (NAND_SELn) = ON (LOW)
>> + * SW5.9 (GPMC_WPN) = OFF (HIGH)
>> + */
[...]
Uggh.. ignore my comment - I see you already did that.. my bad.. i missed it :(
Quickly trying to test this, I got the following:
"
[ 1.840728] omap-gpmc 50000000.gpmc: GPMC revision 6.0
[ 1.847290] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xca
[ 1.854003] nand: Micron MT29F2G16ABAEAWP
[ 1.858245] nand: 256MiB, SLC, page size: 2048, OOB size: 64
[ 1.864227] omap2-nand omap2-nand.0: CONFIG_MTD_NAND_OMAP_BCH not enabled
[ 1.871459] omap2-nand: probe of omap2-nand.0 failed with error -22
"
Full log: http://hastebin.com/ozugepemin.md
Does this depend on
http://marc.info/?l=linux-omap&m=141389532511600&w=2 to function? I
assume yes.
as well?
---
Regards,
Nishanth Menon
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