On Fri, Sep 19, 2014 at 11:50:01AM +0200, Alexandre Belloni wrote: > On 26/08/2014 at 16:17:57 +0200, Tomasz Figa wrote : > > Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch > > settings configured in registers leading to crashes if L2C is enabled > > without overriding them. This patch introduces bindings to enable > > prefetch settings to be specified from DT and necessary support in the > > driver. > > > > Signed-off-by: Tomasz Figa <t.figa@xxxxxxxxxxx> > > Tested-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxxxxxxxxx> > > It is working and useful on Atmel's sama5d4 were the bootloader is not > configuring the L2C prefetch. However, I'm wondering whether we should > add support for setting L310_PREFETCH_CTRL_DATA_PREFETCH and > L310_PREFETCH_CTRL_INSTR_PREFETCH. I'm currently doing it by using > ".l2c_aux_val = L310_AUX_CTRL_DATA_PREFETCH | > L310_AUX_CTRL_INSTR_PREFETCH" (those are the same bits) but this has the > disadvantage of displaying the "L2C: platform modifies aux control > register:" twice. The L2C documentation, freely available from the ARM infocentre website, has the answer to this for you. The two bits in the prefetch control register which control the data and instruction prefetching are aliases of the aux control register. If you set them to a value in one register, they are reflected in the other. The reason for that is that once the L2 cache is enabled, writes to the aux control register are no longer permitted, but it's safe to enable and disable the prefetching with the cache already enabled. This reason is even stated in the documentation. -- FTTC broadband for 0.8mile line: currently at 9.5Mbps down 400kbps up according to speedtest.net. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
