On Wednesday 09 July 2014 08:39 AM, Russell King - ARM Linux wrote: > On Wed, Jul 09, 2014 at 05:56:37PM +0530, Sekhar Nori wrote: >> On Wednesday 09 July 2014 02:55 PM, Tony Lindgren wrote: >>> I guess no more comments. Took a look at the patch again, Sekhar, can >>> you please update the description with what has been discovered in this >>> thread and repost? >> >> How does the following sound: >> >> --- >> AM437x has L2C-310 version r3p2 and ROM code on that device does not >> support writing to L2C-310 power control register. The L2C driver, >> however, tries writing to this register for all revisions >= r3p0. >> >> This leads to a warning dump on boot which leads most users to believe >> that L2 cache is non-functional. >> Power controller register setting doesn't make cache controller functional but it is for really clock gating and standby. So please reword, the above statement accordingly. >> Since the problem is understood, and cannot be addressed through >> software, replace the warning with a pr_info() while maintaining the >> WARN_ON() for other truly unexpected scenarios. >> Instead of being vague here and below, I will just make it very simple as below. On OMAP SOCs using PL310 controllers, Power_ctrl register is not accessible from non-secure software on PL310 versions which supports it. The secure code takes care of setting it up correctly and the power transitions are proven on these devices. So lets add the ignore write check for PL310 Power_ctrl register write. >> >From the public TRM available for OMAP4470, even on that device, ROM >> does not support writing to this register even though it uses a version >> of L2C-310 which has the register implemented. So this patch should take >> care of all variants of existing OMAPs. >> --- > > That sounds perfect, and explains why the change has to exist, and why > it can't be fixed elsewhere. Thanks for providing the full reasoning in > the commit message. > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
