* Roger Quadros <rogerq@xxxxxx> [140701 03:13]: > On 06/13/2014 03:08 PM, Tony Lindgren wrote: > > * Roger Quadros <rogerq@xxxxxx> [140613 04:43]: > >> > >> OK. I agree about using some kind of abstraction instead of direct access. > > > > Yes and like we chatted on irc, adding a syscon mapping for for > > the NAND specific registers might do the trick here. > > After looking at the syscon driver, which relies on regmap, it seems that regmap was designed for slow control busses like I2C/SPI and using it for NAND controller register access will have a significant negative impact on performance. In the NAND case the register writes are used for each NAND command cycle and the reads for ECC checks (every page). > > See how much code regmap_read and regmap_mmio_read() translates to for a simple register read i.e. readl(). > http://lxr.free-electrons.com/source/drivers/base/regmap/regmap.c#L1944 > http://lxr.free-electrons.com/source/drivers/base/regmap/regmap-mmio.c#L129 > > So I'm not so sure of using regmap/syscon for NAND controller register access. OK yes I agree, it's not a good solution for a constant register access that's needed for the ECC registers. > Could there be any other abstraction method of sharing the register space between GPMC and NAND driver? > I've also added Ivan to the thread, the author of memory/ti-aemif.c driver, to check if he faced any issues with shared register access of the AEMIF/NAND registers. If there's no common framework available for GPMC to implement, it's best to just export few functions from gpmc.c for the ECC calculations. Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
