Re: [PATCH v5 6/6] usb: musb: dsps: Enable sw babble control for newer silicon

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On 5/22/2014 5:28 PM, Sergei Shtylyov wrote:
Hello.

On 22-05-2014 10:29, George Cherian wrote:

Find whether we are running on newer silicon. The babble control
register reads 0x4 by default in newer silicon as opposed to 0
in old versions of AM335x. Based on this enable the sw babble
control logic.

Signed-off-by: George Cherian <george.cherian@xxxxxx>
---
drivers/usb/musb/musb_dsps.c | 38 ++++++++++++++++++++++++++++++++------
  1 file changed, 32 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index 868caf8..2ced061 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
[...]
@@ -469,6 +470,19 @@ static int dsps_musb_init(struct musb *musb)
      val &= ~(1 << wrp->otg_disable);
      dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);

+    /*
+     *  Check whether the dsps version has babble control enabled.

   One space too many before this sentence.

+     * In latest silicon revision the babble control logic is enabled.
+     * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
+     * logic enabled.
+     */
+    val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
+    if (val == MUSB_BABBLE_RCV_DISABLE) {
+        glue->sw_babble_enabled = true;
+        val |= MUSB_BABBLE_SW_SESSION_CTRL;
+        dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
+    }
+

Hm, from the register offset that you declared in the previous patch, I got an impression that this is a new standard MUSB register?
Its very AM335x MUSB specific register, not a standard one.
Unfortunately the designers put it as part of MUSB core regs.
Shouldn't this check be done in the generic MUSB code then?

WBR, Sergei



--
-George

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