From: Sathya Prakash M R <sathyap@xxxxxx>
disp_clk is a mux-clock, and to set the rate of the parent PLL, we need
ti,set-rate-parent flag.
Add the flag.
Signed-off-by: Sathya Prakash M R <sathyap@xxxxxx>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@xxxxxx>
---
arch/arm/boot/dts/am43xx-clocks.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi
index 142009cc9332..144663ba7739 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -511,6 +511,7 @@
compatible = "ti,mux-clock";
clocks = <&dpll_disp_m2_ck>, <&dpll_core_m5_ck>, <&dpll_per_m2_ck>;
reg = <0x4244>;
+ ti,set-rate-parent;
};
dpll_extdev_ck: dpll_extdev_ck {
--
1.9.1
--
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