We don't need to issue a barrier for every segment of a DMA transfer; doing this just once per descriptor will do. Signed-off-by: Russell King <rmk+kernel@xxxxxxxxxxxxxxxx> --- drivers/dma/omap-dma.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c index bdea85802b5b..e212e0df9b42 100644 --- a/drivers/dma/omap-dma.c +++ b/drivers/dma/omap-dma.c @@ -194,7 +194,6 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) val = c->plat->dma_read(CCR, c->dma_ch); val |= CCR_ENABLE; - mb(); c->plat->dma_write(val, CCR, c->dma_ch); } @@ -301,6 +300,13 @@ static void omap_dma_start_desc(struct omap_chan *c) c->desc = d = to_omap_dma_desc(&vd->tx); c->sgidx = 0; + /* + * This provides the necessary barrier to ensure data held in + * DMA coherent memory is visible to the DMA engine prior to + * the transfer starting. + */ + mb(); + c->plat->dma_write(d->ccr, CCR, c->dma_ch); if (dma_omap1()) c->plat->dma_write(d->ccr >> 16, CCR2, c->dma_ch); -- 1.7.4.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
