[PATCH 3/3] driver: pwmss: Disable stop clk bit during enable clock call.

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Writing to ecap register on second insmod crashes with an external
abort. This happens becuase the STOP_CLK bit remains set(from rmmod) 
during the second insmod thereby not allowing the clocks to get enabled.

So, we disable STOP clock bit while doing a clock enable.

Signed-off-by: Sourav Poddar <sourav.poddar@xxxxxx>
---
 drivers/pwm/pwm-tipwmss.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/pwm/pwm-tipwmss.c b/drivers/pwm/pwm-tipwmss.c
index 3b119bc..4749866 100644
--- a/drivers/pwm/pwm-tipwmss.c
+++ b/drivers/pwm/pwm-tipwmss.c
@@ -40,6 +40,8 @@ u16 pwmss_submodule_state_change(struct device *dev, int set)
 
 	mutex_lock(&info->pwmss_lock);
 	val = readw(info->mmio_base + PWMSS_CLKCONFIG);
+	if (set == PWMSS_ECAPCLK_EN)
+		val &= ~PWMSS_ECAPCLK_STOP_REQ;
 	val |= set;
 	writew(val , info->mmio_base + PWMSS_CLKCONFIG);
 	mutex_unlock(&info->pwmss_lock);
-- 
1.7.1

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