Tony Lindgren <tony@xxxxxxxxxxx> writes:
> * Paul Walmsley <paul@xxxxxxxxx> [081114 09:46]:
>>
>> During _omap3_noncore_dpll_lock(), if a DPLL has no active downstream
>> clocks and DPLL autoidle is enabled, the DPLL may never lock, since it
>> will enter autoidle immediately. To resolve this, disable DPLL
>> autoidle while locking the DPLL, and unconditionally wait for the DPLL
>> to lock. This fixes some bugs where the kernel would hang when returning
>> from retention or return the wrong rate for the DPLL.
>>
>> This patch is a collaboration with Peter de Schrijver
>> <peter.de-schrijver@xxxxxxxxx> and Kevin Hilman
>> <khilman@xxxxxxxxxxxxxxxxxxx>.
>
> Pushing to l-o tree today.
>
Actually, I think Tero and Paul have a different fix for this now,
which is what I've included in the latest PM branch.
Tero can you send the updated version of you "Fix a bug with noncore
dpll rate calculation" patch?
Kevin
>
>
>> Signed-off-by: Paul Walmsley <paul@xxxxxxxxx>
>> Cc: Peter de Schrijver <peter.de-schrijver@xxxxxxxxx>
>> Cc: Kevin Hilman <khilman@xxxxxxxxxxxxxxxxxxx>
>> ---
>> arch/arm/mach-omap2/clock34xx.c | 15 +++++----------
>> 1 files changed, 5 insertions(+), 10 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
>> index 3a4e160..b8b4494 100644
>> --- a/arch/arm/mach-omap2/clock34xx.c
>> +++ b/arch/arm/mach-omap2/clock34xx.c
>> @@ -163,19 +163,14 @@ static int _omap3_noncore_dpll_lock(struct clk *clk)
>>
>> ai = omap3_dpll_autoidle_read(clk);
>>
>> + omap3_dpll_deny_idle(clk);
>> +
>> _omap3_dpll_write_clken(clk, DPLL_LOCKED);
>>
>> - if (ai) {
>> - /*
>> - * If no downstream clocks are enabled, CM_IDLEST bit
>> - * may never become active, so don't wait for DPLL to lock.
>> - */
>> - r = 0;
>> + r = _omap3_wait_dpll_status(clk, 1);
>> +
>> + if (ai)
>> omap3_dpll_allow_idle(clk);
>> - } else {
>> - r = _omap3_wait_dpll_status(clk, 1);
>> - omap3_dpll_deny_idle(clk);
>> - };
>>
>> return r;
>> }
>> --
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