On Fri, 2008-11-14 at 11:45 -0800, ext David Brownell wrote: > On Friday 14 November 2008, ext-eero.nurkkala@xxxxxxxxx wrote: > > The prescalers for 100 kHz and 400 kHz mode > > are wrong. The internal clock is the fclock > > divided by the prescaler. The PSC is an 8 bit > > field in omap3430. Moreover, the scll and > > sclh values should be adjusted properly. > > Having the correct prescaler is important in > > the process of getting a finite i2c clock. In > > addition, the prescaler is used in the process > > of activating the correct noise filter and thus, > > lets more error resilient i2c communications. > > Should this fix the bug causing the need for that > recent ZOOM patch slowing down twl4030 communication > to 400 MHz? > > And should it let at least some boards talk to their > TWL chips at 3.4 MBit/sec (top speed for standard > highspeed I2C) instead of 2.6 Mbit/sec (pokey slow)? > I've always wondered why all the boards configured > those links to be seemingly slower than allowed ... > > - Dave > Well, this should not affect the High speed I2C at all. Only fast and slow I2C (100 and 400 khz). -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
