Re: [patch 2.6.27-rc8-omap 0/7] resend of pending TWL patches

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(Hit reply instead of reply-all... Reminder to self. Never send emails
when you're sleepy)

On Fri, Oct 3, 2008 at 11:06 PM, Anand Gadiyar <gadiyar@xxxxxxxxx> wrote:
> On Fri, Oct 3, 2008 at 10:12 PM, David Brownell <david-b@xxxxxxxxxxx> wrote:
>> On Friday 03 October 2008, David Brownell wrote:
>>> This flushes my queue of TWL (and related) patches that
>>> seem ready to merge:
>>
>> Sanity tested on Beagle, FYI.
>>
>> Where I observed a new oddity:  the boot hung right after
>> listing the MTD partitions.  Which is where the EHCI code
>> would come up ... took that driver out of the build, and
>> the hang went away.  Clue, oh clue; where art thou?
>>
>
> Well... Any chance this bit of code here helps? This infinite loop
> shouldn't even have been here. Oh well.
>
>
> ====CUT_HERE=====
> Remove infinite loop in DPLL 5 programming. Ideally, DPLL5 should be
> taken care of by the clock framework.
> ---
>  drivers/usb/host/ehci-omap.c |    2 ++
>  1 files changed, 2 insertions(+)
>
> Index: linux-omap-2.6/drivers/usb/host/ehci-omap.c
> ===================================================================
> --- linux-omap-2.6.orig/drivers/usb/host/ehci-omap.c    2008-09-18
> 14:59:34.000000000 +0530
> +++ linux-omap-2.6/drivers/usb/host/ehci-omap.c 2008-09-18
> 15:00:09.737475758 +0530
> @@ -170,10 +170,12 @@ static int omap_start_ehc(struct platfor
>                        (7 << OMAP3430ES2_EN_PERIPH2_DPLL_SHIFT),
>                        PLL_MOD, OMAP3430ES2_CM_CLKEN2);
>
> +#if 0
>        while (!(cm_read_mod_reg(PLL_MOD, CM_IDLEST2) &
>                                OMAP3430ES2_ST_PERIPH2_CLK_MASK))
>                dev_dbg(hcd->self.controller, "idlest2 = 0x%x\n",
>                        cm_read_mod_reg(PLL_MOD, CM_IDLEST2));
> +#endif
>        /* End DPLL5 programming */
>
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