Hi Rajendra,
On Thu, 25 Sep 2008, Rajendra Nayak wrote:
> I tried this patch on top of the pm-1 branch. On the 3430SDP I see idle being able to
> hit CORE RET, but system suspend seems to crash. See the crash log below.
thanks for the report. Does this patch fix it?
- Paul
OMAP3 clock: fix dss1_alwon_fck
From: Paul Walmsley <paul@xxxxxxxxx>
Commit a63efb1547ac35dcb0f007090396a3c7510eb691 broke the dss1_alwon_fck
clock enable on 3430ES2+. The clock code was not waiting for the module
to come out of idle.
Problem reported by Rajendra Nayak <rnayak@xxxxxx>.
Signed-off-by: Paul Walmsley <paul@xxxxxxxxx>
---
arch/arm/mach-omap2/clock34xx.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 8ce7097..4722277 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -2304,7 +2304,7 @@ static struct clk dss1_alwon_fck_3430es1 = {
.prcm_mod = OMAP3430_DSS_MOD,
.enable_reg = CM_FCLKEN,
.enable_bit = OMAP3430_EN_DSS1_SHIFT,
- .flags = CLOCK_IN_OMAP343X,
+ .flags = CLOCK_IN_OMAP3430ES1,
.clkdm = { .name = "dss_clkdm" },
.recalc = &followparent_recalc,
};
@@ -2317,7 +2317,7 @@ static struct clk dss1_alwon_fck_3430es2 = {
.enable_reg = CM_FCLKEN,
.enable_bit = OMAP3430_EN_DSS1_SHIFT,
.idlest_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT,
- .flags = CLOCK_IN_OMAP343X | WAIT_READY,
+ .flags = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
.clkdm = { .name = "dss_clkdm" },
.recalc = &followparent_recalc,
};
--
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