Re: [RFC][DRAFT] TODO list for TI DSP BRIDGE

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Hi Hari,

From: "ext Kanigeri, Hari" <h-kanigeri2@xxxxxx>
Subject: RE: [RFC][DRAFT] TODO list for TI DSP BRIDGE
Date: Thu, 21 Aug 2008 10:37:12 -0500

> Hi Doyu-san,
> 
> > I think that this virtual clock may allow any arbitrary combination of
> > clocks and it may be possible to have multiple hierarchy of virtual
> > clocks like:
> > 
> >    dsp_clocks
> >    |
> >    |-- peripheral_clocks
> >    |     |
> >    |     |-- gpt5
> >    |     |    |- gpt5_ick
> >    |     |    `- gpt5_fck
> >    |
> >    |-- ....
> >    ..
> > 
> > Any comments would be appreciated.
> 
> 
> The feature looks good, but I think we cannot use this in DSP Bridge
> for following reasons.
> 
> This implementation is under the assumption that we will either
> enable or disable all the registered Bridge Peripherals clocks,
> which is not the case in reality.
> 
> In Bridge, we cannot make the assumption that all the registered
> clocks will be enabled. Bridge cannot use the vclk_enable function
> because this will enable all the registered clocks, which is not
> accepted. The clocks should be enabled only based on the request
> from DSP...it is use case driven.

Agreed, thinking about the above use case(operation).

	Hiroshi DOYU

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