Hi, Looks like a tweak from the ARM or TI tree may be needed. Builds of recent pulls of the OMAP3 kernel show L2 cache is disabled. This really has a huge performance impact. I don't have time right now to suggest a patch but may look some time this week. TI internal kernels do have it enabled. A stop in Lauterbach and a look at the L2EN bit in AUX control register will show it is not correct. Regards, Richard W. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
