Re: [PATCH] ARM: OMAP2: Add pinmux support for OMAP3430

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On Wed, 2008-01-23 at 16:53 -0800, ext Tony Lindgren wrote:
> From: Gadiyar, Anand <gadiyar@xxxxxx>
> 
> This patch adds pinmux support for OMAP3.
....
> +
> +/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
> +MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP",	0x5d8,	3,	1,	1,	0,
> +				0, 	0,	0, 	1, 	1,	0)

Seriously - 12 positional arguments to configure an IO pad? - where 9 of
them are 0/1 flags?

... and the mode for this pad is output with pull-up? That sounds wrong,
and would be a waste of power! I would really like to avoid this kind of
errors(!)

Browsing through the TRM it becomes obvious that only very few
combinations makes any sense. 
Basically you have to configure the pad for active mode and off state. 

In active state the state can be output or input with some kind of pull.

So all valid states for the first argument (active) is one of:
	OUTPUT
	INPUT
	INPUT_PULLUP
	INPUT_PULLDOWN

Off mode is more complicated. As you select  here you can have input
with combinations of wake and pull and output high or low.

The second argument (off) can be:
	NONE
	OUTPUT_H
	OUTPUT_L
	INPUT_PULLUP
	INPUT_PULLDOWN
	INPUT_PULLUP_WAKE
	INPUT_PULLDOWN_WAKE

This:

MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6, 3,  0,  0,  1, 
          0,  0,  0,  0,  0, 0)

could be expressed with:

MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6, 3, INPUT, OFF_NONE)


And you would spot the error in this one right away:

MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP",	0x5d8,	3, 1,  1,  0,
	0,  0,  0, 1,  1,  0)

which would become:

MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP",	0x5d8,	3, OUTPUT, OFF_INPUT_PULL_H)


Just a thought,

Klaus

>  
>  #define OMAP24XX_PULL_ENA	(1 << 3)
>  #define OMAP24XX_PULL_UP	(1 << 4)
>  
> +#define OMAP3_INPUT_EN		(1 << 8)
> +#define OMAP3_OFF_EN		(1 << 9)
> +#define OMAP3_OFFOUT_EN		(1 << 10)
> +#define OMAP3_OFFOUT_VAL	(1 << 11)
> +#define OMAP3_OFF_PULL_EN	(1 << 12)
> +#define OMAP3_OFF_PULL_UP	(1 << 13)
> +#define OMAP3_WAKEUP_EN		(1 << 14)
> +
> +#ifdef CONFIG_ARCH_OMAP24XX
> +
>  /* REVISIT: Convert this code to use ctrl_{read,write}_reg */
>  int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
>  {
> @@ -248,6 +323,69 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
>  }
>  #endif
>  
> +#ifdef CONFIG_ARCH_OMAP34XX
> +/* REVISIT: Convert this code to use ctrl_{read,write}_reg */
> +int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
> +{
> +	static DEFINE_SPINLOCK(mux_spin_lock);
> +	unsigned long flags;
> +	u8 reg = 0;
> +	unsigned int warn = 0;
> +
> +	spin_lock_irqsave(&mux_spin_lock, flags);
> +
> +	reg |= cfg->mask & 0x7;
> +
> +	if (cfg->pull_val)
> +		reg |= OMAP24XX_PULL_ENA;
> +	if(cfg->pu_pd_val)
> +		reg |= OMAP24XX_PULL_UP;
> +
> +	if (cfg->input_en_val)
> +		reg |= OMAP3_INPUT_EN;
> +
> +	if (cfg->offenable)
> +		reg |= OMAP3_OFF_EN;
> +
> +	if (cfg->offoutenable)
> +		reg |= OMAP3_OFFOUT_EN;
> +
> +	if (cfg->offoutvalue)
> +		reg |= OMAP3_OFFOUT_VAL;
> +
> +	if (cfg->offpulludenable)
> +		reg |= OMAP3_OFF_PULL_EN;
> +
> +	if (cfg->offpulltypeselect)
> +		reg |= OMAP3_OFF_PULL_UP;
> +
> +	if (cfg->wakeupenable)
> +		reg |= OMAP3_WAKEUP_EN;
> +
> +#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
> +	{
> +		u8 orig = omap_readw(omap2_ctrl_base + cfg->mux_reg);
> +		u8 debug = 0;
> +
> +#ifdef CONFIG_OMAP_MUX_DEBUG
> +		debug = cfg->debug;
> +#endif
> +		warn = (orig != reg);
> +		if (debug || warn)
> +			printk(KERN_WARNING
> +				"MUX: setup %s (0x%08lx): 0x%02x -> 0x%02x\n",
> +					cfg->name,
> +					omap2_ctrl_base + cfg->mux_reg,
> +					orig, reg);
> +	}
> +#endif
> +	omap_writew((u16) reg, omap2_ctrl_base + cfg->mux_reg);
> +	spin_unlock_irqrestore(&mux_spin_lock, flags);
> +
> +	return 0;
> +}
> +#endif
> +
>  int __init omap2_mux_init(void)
>  {
>  
> @@ -259,6 +397,14 @@ int __init omap2_mux_init(void)
>  	}
>  #endif
>  
> +#ifdef CONFIG_ARCH_OMAP34XX
> +	if (cpu_is_omap34xx()) {
> +		arch_mux_cfg.pins	= omap34xx_pins;
> +		arch_mux_cfg.size	= ARRAY_SIZE(omap34xx_pins);
> +		arch_mux_cfg.cfg_reg	= omap34xx_cfg_reg;
> +	}
> +#endif
> +
>  	return omap_mux_register(&arch_mux_cfg);
>  }
>  
> diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h
> index aa89835..95cabe9 100644
> --- a/include/asm-arm/arch-omap/mux.h
> +++ b/include/asm-arm/arch-omap/mux.h
> @@ -132,6 +132,30 @@
>  	.pu_pd_val	= pull_mode,				\
>  },
>  
> +#define MUX_CFG_34XX(desc, reg_offset, mode,		\
> +			pull_en, pull_mode,		\
> +			input_en,			\
> +			off_en,				\
> +			offout_en,			\
> +			offout_val,			\
> +			offpullud_en,			\
> +			offpull_typesel,			\
> +			wakeup_en)			\
> +{							\
> +	.name		= desc,				\
> +	.debug		= 0,				\
> +	.mux_reg	= reg_offset,			\
> +	.mask		= mode,				\
> +	.pull_val	= pull_en,			\
> +	.pu_pd_val	= pull_mode,			\
> +	.input_en_val	= input_en,			\
> +	.offenable	= off_en,			\
> +	.offoutenable	= offout_en,			\
> +	.offoutvalue	= offout_val,			\
> +	.offpulludenable	= offpullud_en,		\
> +	.offpulltypeselect	= offpull_typesel,	\
> +	.wakeupenable	= wakeup_en			\
> +},
>  
>  #define PULL_DISABLED	0
>  #define PULL_ENABLED	1
> @@ -157,6 +181,14 @@ struct pin_config {
>  	const char *pu_pd_name;
>  	const unsigned int pu_pd_reg;
>  	const unsigned char pu_pd_val;
> +
> +	const unsigned input_en_val:1;
> +	const unsigned offenable:1;
> +	const unsigned offoutenable:1;
> +	const unsigned offoutvalue:1;
> +	const unsigned offpulludenable:1;
> +	const unsigned offpulltypeselect:1;
> +	const unsigned wakeupenable:1;
>  };
>  
>  enum omap730_index {
> @@ -597,6 +629,39 @@ enum omap24xx_index {
>  	AD16_2430_MCBSP2_CLX_OFF,
>  	AE13_2430_MCBSP2_DX_OFF,
>  	AD13_2430_MCBSP2_DR_OFF,
> +
> +};
> +
> +enum omap34xx_index {
> +
> +	/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
> +	Y9_3430_USB1HS_PHY_STP,
> +	Y8_3430_USB1HS_PHY_CLK,
> +	W13_3430_USB1HS_PHY_DATA0,
> +	W12_3430_USB1HS_PHY_DATA1,
> +	W11_3430_USB1HS_PHY_DATA2,
> +	Y13_3430_USB1HS_PHY_DATA7,
> +	W9_3430_USB1HS_PHY_DATA4,
> +	Y12_3430_USB1HS_PHY_DATA5,
> +	W8_3430_USB1HS_PHY_DATA6,
> +	Y11_3430_USB1HS_PHY_DATA3,
> +	AA14_3430_USB1HS_PHY_DIR,
> +	AA11_3430_USB1HS_PHY_NXT,
> +
> +	/* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
> +	AA8_3430_USB2HS_PHY_CLK,
> +	AA10_3430_USB2HS_PHY_STP,
> +	AA9_3430_USB2HS_PHY_DIR,
> +	AB11_3430_USB2HS_PHY_NXT,
> +	AB10_3430_USB2HS_PHY_DATA0,
> +	AB9_3430_USB2HS_PHY_DATA1,
> +	W3_3430_USB2HS_PHY_DATA2,
> +	T2_3430_USB2HS_PHY_DATA7,
> +	T3_3430_USB2HS_PHY_DATA4,
> +	R3_3430_USB2HS_PHY_DATA5,
> +	R4_3430_USB2HS_PHY_DATA6,
> +	T4_3430_USB2HS_PHY_DATA3,
> +
>  };
>  
>  struct omap_mux_cfg {
-
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