Hello Vikram,
a few comments:
On Thu, 24 Jan 2008, Pandita, Vikram wrote:
> + omap_writel((12 << CM_CLKSEL4_PLL_PERIPH2_DPLL_DIV_SHIFT)|
> + (120 << CM_CLKSEL4_PLL_PERIPH2_DPLL_MULT_SHIFT),
> + CM_CLKSEL4_PLL);
Please change reads and writes to CM registers to use
cm_{read,write}_{mod,}_reg(). These should use the defines in cm.h and
cm_regbits_34xx.h and prcm_common.h. One advantage of doing this are that
CM register debugging can be enabled to track all CM register writes.
Plus it will automatically compute the CM module offset, so you won't need
to create your own register defines, like CM_CLKSEL4_PLL.
Regarding the register bit shift defines, perhaps you can add
OMAP3430ES2_PERIPH2_DPLL_MULT_SHIFT and OMAP3430ES2_PERIPH2_DPLL_DIV_SHIFT
to cm_regbits_34xx.h, next to the mask definitions for the same bits, and
use those. This keeps all of these definitions in the same place.
So the above could be written as:
cm_write_mod_reg((12 << OMAP3430ES2_PERIPH2_DPLL_DIV_SHIFT) |
(120 << OMAP3430ES2_PERIPH2_DPLL_MULT_SHIFT),
PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
> Index: omap-submit/drivers/usb/host/ehci-omap.h
> ===================================================================
>
> +/* PRCM: CLOCK_Control_CM */
> +#define CM_CLKEN2_PLL\
> + (OMAP2_CM_BASE + PLL_MOD + OMAP3430ES2_CM_CLKEN2)
> + #define CM_CLKEN2_PLL_PERIPH2_DPLL_FREQSEL_SHIFT 4
> + #define PERIPH2_DPLL_FREQSEL_EN_PERIPH2_DPLL_SHIFT 0
> +
> +#define CM_IDLEST2_CKGEN\
> + (OMAP2_CM_BASE + PLL_MOD + CM_IDLEST2)
> + #define CM_IDLEST2_CKGEN_ST_120M_CLK_SHIFT 1
> +
> +#define CM_CLKSEL4_PLL\
> + (OMAP2_CM_BASE + PLL_MOD + OMAP3430ES2_CM_CLKSEL4)
> + #define CM_CLKSEL4_PLL_PERIPH2_DPLL_MULT_SHIFT 8
> + #define CM_CLKSEL4_PLL_PERIPH2_DPLL_DIV_SHIFT 0
> +
> +#define CM_CLKSEL5_PLL\
> + (OMAP2_CM_BASE + PLL_MOD + OMAP3430ES2_CM_CLKSEL5)
> + #define CM_CLKSEL5_PLL_DIV_120M_SHIFT 0
> +
> +/* PRCM: CORE_CM for TLL */
> +#define CM_FCLKEN3_CORE\
> + (OMAP2_CM_BASE + CORE_MOD + OMAP3430ES2_CM_FCLKEN3)
> +#define CM_ICLKEN3_CORE\
> + (OMAP2_CM_BASE + CORE_MOD + CM_ICLKEN3)
> +#define CM_IDLEST3_CORE\
> + (OMAP2_CM_BASE + CORE_MOD + 0x28)
> + #define CM_IDLEST3_CORE_ST_USBTLL_SHIFT 2
> +#define CM_AUTOIDLE3_CORE\
> + (OMAP2_CM_BASE + CORE_MOD + 0x38)
> + #define CM_AUTOIDLE3_CORE_AUTO_USBTLL_SHIFT 2
> +
> +/* PRCM: USBHOST_CM */
> +#define CM_FCLKEN_USBHOST\
> + (OMAP2_CM_BASE + OMAP3430ES2_USBHOST_MOD + CM_FCLKEN)
> +#define CM_ICLKEN_USBHOST\
> + (OMAP2_CM_BASE + OMAP3430ES2_USBHOST_MOD + CM_ICLKEN)
> +#define CM_IDLEST_USBHOST\
> + (OMAP2_CM_BASE + OMAP3430ES2_USBHOST_MOD + CM_IDLEST)
> +#define CM_AUTOIDLE_USBHOST\
> + (OMAP2_CM_BASE + OMAP3430ES2_USBHOST_MOD + CM_AUTOIDLE)
> + #define CM_AUTOIDLE_USBHOST_AUTO_USBHOST_SHIFT 0
> +
> +#define CM_SLEEPDEP_USBHOST\
> + (OMAP2_CM_BASE + OMAP3430ES2_USBHOST_MOD + 0x44)
> + #define CM_SLEEPDEP_USBHOST_EN_MPU_SHIFT 1
> + #define CM_SLEEPDEP_USBHOST_EN_IVA2_SHIFT 2
> +
> +#define CM_CLKSTCTRL_USBHOST\
> + (OMAP2_CM_BASE + OMAP3430ES2_USBHOST_MOD + CM_CLKSTCTRL)
> +#define CM_CLKSTST_USBHOST\
> + (OMAP2_CM_BASE + OMAP3430ES2_USBHOST_MOD + OMAP3430_CM_CLKSTST)
> +
> +/* PRCM: USBHOST_PRM */
> +#define RM_RSTST_USBHOST\
> + (OMAP2_PRM_BASE + OMAP3430ES2_USBHOST_MOD + RM_RSTST)
> +#define PM_WKEN_USBHOST\
> + (OMAP2_PRM_BASE + OMAP3430ES2_USBHOST_MOD + PM_WKEN)
> +#define PM_MPUGRPSEL_USBHOST\
> + (OMAP2_PRM_BASE + OMAP3430ES2_USBHOST_MOD + OMAP3430_PM_MPUGRPSEL)
> +#define PM_IVA2GRPSEL_USBHOST\
> + (OMAP2_PRM_BASE + OMAP3430ES2_USBHOST_MOD + OMAP3430_PM_IVAGRPSEL)
> +#define PM_WKST_USBHOST\
> + (OMAP2_PRM_BASE + OMAP3430ES2_USBHOST_MOD + PM_WKST)
> +#define PM_WKDEP_USBHOST\
> + (OMAP2_PRM_BASE + OMAP3430ES2_USBHOST_MOD + PM_WKDEP)
> +#define PM_PWSTCTRL_USBHOST\
> + (OMAP2_PRM_BASE + OMAP3430ES2_USBHOST_MOD + PM_PWSTCTRL)
> +#define PM_PWSTST_USBHOST\
> + (OMAP2_PRM_BASE + OMAP3430ES2_USBHOST_MOD + PM_PWSTST)
> +#define PM_PREPWSTST_USBHOST\
> + (OMAP2_PRM_BASE + OMAP3430ES2_USBHOST_MOD + OMAP3430_PM_PREPWSTST)
Please use what's defined in the CM and PRM include files here. Defining
new macros there if needed.
Regards,
- Paul
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