On Wed, Jun 22, 2016 at 05:04:22PM +0300, Sagi Grimberg wrote: > > >+ /* This is overkill, but hardware requires that the > >+ * PBL array begins at a properly aligned address and > >+ * never occupies the last 8 bytes of a page. > >+ */ > >+ mr->pages = (__be64 *)get_zeroed_page(GFP_KERNEL); > >+ if (!mr->pages) > > return -ENOMEM; > > Again, I'm not convinced that this is a better choice then allocating > the exact needed size as dma coherent, but given that the dma coherent > allocations are always page aligned I wander if it's not the same > effect... > > In any event, we can move forward with this for now: > > Reviewed-by: Sagi Grimberg <sagi@xxxxxxxxxxx> Thanks Sagi, As an update, we don't have reliable answer regarding mlx5 yet, if similar limitation exists there too.
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