Hi Stephen,
On 1/7/25 01:11, Stephen Rothwell wrote:
Hi all,
After merging the xilinx tree, today's linux-next build (arm
multi_v7_defconfig) produced these warnings:
arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts:55.3-13: Warning (reg_format): /axi/memory-controller@e000e000/nand-controller@0,0/nand@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/xilinx/zynq-ebaz4205.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/xilinx/zynq-ebaz4205.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
arch/arm/boot/dts/xilinx/zynq-ebaz4205.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/xilinx/zynq-ebaz4205.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts:54.9-56.4: Warning (avoid_default_addr_size): /axi/memory-controller@e000e000/nand-controller@0,0/nand@0: Relying on default #address-cells value
arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts:54.9-56.4: Warning (avoid_default_addr_size): /axi/memory-controller@e000e000/nand-controller@0,0/nand@0: Relying on default #size-cells value
Presumably introduced by commit
dd6c610ac948 ("ARM: zynq: Do not define address/size-cells for nand-controller")
Thanks for reporting it. I have removed this patch and send new version of this
patch.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs
TF-A maintainer - Xilinx ZynqMP/Versal/Versal NET SoCs
