Hi all,
FIXME: Add owner of second tree to To:
Add author(s)/SOB of conflicting commits.
Today's linux-next merge of the drivers-x86 tree got conflicts in:
drivers/platform/x86/intel/pmc/adl.c
drivers/platform/x86/intel/pmc/cnp.c
drivers/platform/x86/intel/pmc/core.h
drivers/platform/x86/intel/pmc/mtl.c
drivers/platform/x86/intel/pmc/tgl.c
between commits:
6f9cc5c1f94d ("platform/x86/intel/pmc: Allow reenabling LTRs")
70681aa0746a ("platform/x86/intel/pmc: Move GBE LTR ignore to suspend callback")
from Linus' tree and commits:
2e35e3aa9f10 ("platform/x86:intel/pmc: Call pmc_get_low_power_modes from platform init")
4d621c3f02ba ("platform/x86/intel/pmc: Retrieve LPM information using Intel PMT")
d79c3c82ee82 ("platform/x86/intel/pmc: Move common code to core.c")
935b8211a31a ("platform/x86/intel/pmc: Read low power mode requirements for MTL-M and MTL-P")
1d62ada48d41 ("platform/x86/intel/pmc: Add ssram_init flag in PMC discovery in Meteor Lake")
544f7b7f651c ("platform/x86/intel/pmc: Add regmap for Tiger Lake H PCH")
from the drivers-x86 tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc drivers/platform/x86/intel/pmc/adl.c
index 606f7678bcb0,882f2d5d8937..000000000000
--- a/drivers/platform/x86/intel/pmc/adl.c
+++ b/drivers/platform/x86/intel/pmc/adl.c
@@@ -322,5 -321,13 +324,7 @@@ int adl_core_init(struct pmc_dev *pmcde
if (ret)
return ret;
+ pmc_core_get_low_power_modes(pmcdev);
+
- /* Due to a hardware limitation, the GBE LTR blocks PC10
- * when a cable is attached. Tell the PMC to ignore it.
- */
- dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
- pmc_core_send_ltr_ignore(pmcdev, 3);
-
return 0;
}
diff --cc drivers/platform/x86/intel/pmc/cnp.c
index 98b36651201a,59298f184d0e..000000000000
--- a/drivers/platform/x86/intel/pmc/cnp.c
+++ b/drivers/platform/x86/intel/pmc/cnp.c
@@@ -234,5 -214,13 +234,7 @@@ int cnp_core_init(struct pmc_dev *pmcde
if (ret)
return ret;
+ pmc_core_get_low_power_modes(pmcdev);
+
- /* Due to a hardware limitation, the GBE LTR blocks PC10
- * when a cable is attached. Tell the PMC to ignore it.
- */
- dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
- pmc_core_send_ltr_ignore(pmcdev, 3);
-
return 0;
}
diff --cc drivers/platform/x86/intel/pmc/core.h
index b66dacbfb94b,2891d8d04fad..000000000000
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@@ -486,9 -511,61 +513,61 @@@ extern const struct pmc_bit_map mtl_ioe
extern const struct pmc_bit_map mtl_ioem_vnn_req_status_1_map[];
extern const struct pmc_bit_map *mtl_ioem_lpm_maps[];
extern const struct pmc_reg_map mtl_ioem_reg_map;
+ extern const struct pmc_reg_map lnl_socm_reg_map;
+
+ /* LNL */
+ extern const struct pmc_bit_map lnl_ltr_show_map[];
+ extern const struct pmc_bit_map lnl_clocksource_status_map[];
+ extern const struct pmc_bit_map lnl_power_gating_status_0_map[];
+ extern const struct pmc_bit_map lnl_power_gating_status_1_map[];
+ extern const struct pmc_bit_map lnl_power_gating_status_2_map[];
+ extern const struct pmc_bit_map lnl_d3_status_0_map[];
+ extern const struct pmc_bit_map lnl_d3_status_1_map[];
+ extern const struct pmc_bit_map lnl_d3_status_2_map[];
+ extern const struct pmc_bit_map lnl_d3_status_3_map[];
+ extern const struct pmc_bit_map lnl_vnn_req_status_0_map[];
+ extern const struct pmc_bit_map lnl_vnn_req_status_1_map[];
+ extern const struct pmc_bit_map lnl_vnn_req_status_2_map[];
+ extern const struct pmc_bit_map lnl_vnn_req_status_3_map[];
+ extern const struct pmc_bit_map lnl_vnn_misc_status_map[];
+ extern const struct pmc_bit_map *lnl_lpm_maps[];
+ extern const struct pmc_bit_map lnl_pfear_map[];
+ extern const struct pmc_bit_map *ext_lnl_pfear_map[];
+
+ /* ARL */
+ extern const struct pmc_bit_map arl_socs_ltr_show_map[];
+ extern const struct pmc_bit_map arl_socs_clocksource_status_map[];
+ extern const struct pmc_bit_map arl_socs_power_gating_status_0_map[];
+ extern const struct pmc_bit_map arl_socs_power_gating_status_1_map[];
+ extern const struct pmc_bit_map arl_socs_power_gating_status_2_map[];
+ extern const struct pmc_bit_map arl_socs_d3_status_2_map[];
+ extern const struct pmc_bit_map arl_socs_d3_status_3_map[];
+ extern const struct pmc_bit_map arl_socs_vnn_req_status_3_map[];
+ extern const struct pmc_bit_map *arl_socs_lpm_maps[];
+ extern const struct pmc_bit_map arl_socs_pfear_map[];
+ extern const struct pmc_bit_map *ext_arl_socs_pfear_map[];
+ extern const struct pmc_reg_map arl_socs_reg_map;
+ extern const struct pmc_bit_map arl_pchs_ltr_show_map[];
+ extern const struct pmc_bit_map arl_pchs_clocksource_status_map[];
+ extern const struct pmc_bit_map arl_pchs_power_gating_status_0_map[];
+ extern const struct pmc_bit_map arl_pchs_power_gating_status_1_map[];
+ extern const struct pmc_bit_map arl_pchs_power_gating_status_2_map[];
+ extern const struct pmc_bit_map arl_pchs_d3_status_0_map[];
+ extern const struct pmc_bit_map arl_pchs_d3_status_1_map[];
+ extern const struct pmc_bit_map arl_pchs_d3_status_2_map[];
+ extern const struct pmc_bit_map arl_pchs_d3_status_3_map[];
+ extern const struct pmc_bit_map arl_pchs_vnn_req_status_0_map[];
+ extern const struct pmc_bit_map arl_pchs_vnn_req_status_1_map[];
+ extern const struct pmc_bit_map arl_pchs_vnn_req_status_2_map[];
+ extern const struct pmc_bit_map arl_pchs_vnn_req_status_3_map[];
+ extern const struct pmc_bit_map arl_pchs_vnn_misc_status_map[];
+ extern const struct pmc_bit_map arl_pchs_signal_status_map[];
+ extern const struct pmc_bit_map *arl_pchs_lpm_maps[];
+ extern const struct pmc_reg_map arl_pchs_reg_map;
extern void pmc_core_get_tgl_lpm_reqs(struct platform_device *pdev);
+ extern int pmc_core_ssram_get_lpm_reqs(struct pmc_dev *pmcdev);
-extern int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value);
+int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore);
int pmc_core_resume_common(struct pmc_dev *pmcdev);
int get_primary_reg_base(struct pmc *pmc);
@@@ -499,12 -579,13 +581,16 @@@ int spt_core_init(struct pmc_dev *pmcde
int cnp_core_init(struct pmc_dev *pmcdev);
int icl_core_init(struct pmc_dev *pmcdev);
int tgl_core_init(struct pmc_dev *pmcdev);
+ int tgl_l_core_init(struct pmc_dev *pmcdev);
+ int tgl_core_generic_init(struct pmc_dev *pmcdev, int pch_tp);
int adl_core_init(struct pmc_dev *pmcdev);
int mtl_core_init(struct pmc_dev *pmcdev);
+ int arl_core_init(struct pmc_dev *pmcdev);
+ int lnl_core_init(struct pmc_dev *pmcdev);
+void cnl_suspend(struct pmc_dev *pmcdev);
+int cnl_resume(struct pmc_dev *pmcdev);
+
#define pmc_for_each_mode(i, mode, pmcdev) \
for (i = 0, mode = pmcdev->lpm_en_modes[i]; \
i < pmcdev->num_lpm_modes; \
diff --cc drivers/platform/x86/intel/pmc/mtl.c
index 504e3e273c32,e75431325dda..000000000000
--- a/drivers/platform/x86/intel/pmc/mtl.c
+++ b/drivers/platform/x86/intel/pmc/mtl.c
@@@ -991,19 -998,35 +1000,30 @@@ int mtl_core_init(struct pmc_dev *pmcde
mtl_d3_fixup();
+ pmcdev->suspend = cnl_suspend;
pmcdev->resume = mtl_resume;
-
pmcdev->regmap_list = mtl_pmc_info_list;
- pmc_core_ssram_init(pmcdev);
- /* If regbase not assigned, set map and discover using legacy method */
- if (!pmc->regbase) {
+ /*
+ * If ssram init fails use legacy method to at least get the
+ * primary PMC
+ */
+ ret = pmc_core_ssram_init(pmcdev, func);
+ if (ret) {
+ ssram_init = false;
+ dev_warn(&pmcdev->pdev->dev,
+ "ssram init failed, %d, using legacy init\n", ret);
pmc->map = &mtl_socm_reg_map;
ret = get_primary_reg_base(pmc);
if (ret)
return ret;
}
+ pmc_core_get_low_power_modes(pmcdev);
+ pmc_core_punit_pmt_init(pmcdev, MTL_PMT_DMU_GUID);
+
- /* Due to a hardware limitation, the GBE LTR blocks PC10
- * when a cable is attached. Tell the PMC to ignore it.
- */
- dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
- pmc_core_send_ltr_ignore(pmcdev, 3);
-
+ if (ssram_init)
+ return pmc_core_ssram_get_lpm_reqs(pmcdev);
+
return 0;
}
diff --cc drivers/platform/x86/intel/pmc/tgl.c
index e88d3d00c853,91fd725951e5..000000000000
--- a/drivers/platform/x86/intel/pmc/tgl.c
+++ b/drivers/platform/x86/intel/pmc/tgl.c
@@@ -258,16 -300,22 +300,20 @@@ int tgl_core_generic_init(struct pmc_de
struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
int ret;
- pmc->map = &tgl_reg_map;
+ if (pch_tp == PCH_H)
+ pmc->map = &tgl_h_reg_map;
+ else
+ pmc->map = &tgl_reg_map;
+ pmcdev->suspend = cnl_suspend;
+ pmcdev->resume = cnl_resume;
+
ret = get_primary_reg_base(pmc);
if (ret)
return ret;
+ pmc_core_get_low_power_modes(pmcdev);
pmc_core_get_tgl_lpm_reqs(pmcdev->pdev);
- /* Due to a hardware limitation, the GBE LTR blocks PC10
- * when a cable is attached. Tell the PMC to ignore it.
- */
- dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
- pmc_core_send_ltr_ignore(pmcdev, 3);
return 0;
}
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