On Mon, Nov 21, 2022 at 10:23:18AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the riscv-dt tree got a conflict in:
>
> Documentation/devicetree/bindings/riscv/cpus.yaml
>
> between commit:
>
> 57e1b873c2f5 ("dt-bindings: riscv: Sort the CPU core list alphabetically")
>
> from the renesas tree and commit:
>
> 41adc2fbad8b ("dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles")
>
> from the riscv-dt tree.
>
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging. You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
Fixup looks good to me Stephen, thanks!
>
> --
> Cheers,
> Stephen Rothwell
>
> diff --cc Documentation/devicetree/bindings/riscv/cpus.yaml
> index 2bf91829c8de,e98a716c6f18..000000000000
> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> @@@ -34,12 -33,14 +34,14 @@@ properties
> - sifive,e5
> - sifive,e7
> - sifive,e71
> - - sifive,u74-mc
> - - sifive,u54
> - - sifive,u74
> + - sifive,rocket0
> - sifive,u5
> + - sifive,u54
> - sifive,u7
> - - canaan,k210
> + - sifive,u74
> + - sifive,u74-mc
> + - thead,c906
> + - thead,c910
> - const: riscv
> - items:
> - enum:
