Hi Maxime,
On Tue, 30 Nov 2021 09:58:31 +0100 Maxime Ripard <maxime@xxxxxxxxxx> wrote:
>
> Unfortunately the merge resolution isn't entirely correct :/
>
> There's multiple conflicts between those two branches on that file, but
> things went wrong between 16e101051f32 and 0c980a006d3f
>
> The first one changes the logic a bit for the clk_set_min_rate argument,
> and the second moves the clk_set_min_rate around.
>
> However, the merge resolution reintroduced the initial clk_set_min_rate
> call line (line 373), without changing the logic of the proper call site
> (line 396).
>
> This is the patch to fix the resolution:
>
> -- >8 --
> --- a/drivers/gpu/drm/vc4/vc4_kms.c 2021-11-30 08:56:28.748524275 +0100
> +++ b/drivers/gpu/drm/vc4/vc4_kms.c 2021-11-29 15:46:11.692151678 +0100
> @@ -365,14 +365,6 @@
> vc4_hvs_mask_underrun(dev, vc4_crtc_state->assigned_channel);
> }
>
> - if (vc4->hvs->hvs5) {
> - unsigned long core_rate = max_t(unsigned long,
> - 500000000,
> - new_hvs_state->core_clock_rate);
> -
> - clk_set_min_rate(hvs->core_clk, core_rate);
> - }
> -
> for (channel = 0; channel < HVS_NUM_CHANNELS; channel++) {
> struct drm_crtc_commit *commit;
> int ret;
> @@ -392,8 +384,13 @@
> old_hvs_state->fifo_state[channel].pending_commit = NULL;
> }
>
> - if (vc4->hvs->hvs5)
> - clk_set_min_rate(hvs->core_clk, 500000000);
> + if (vc4->hvs->hvs5) {
> + unsigned long core_rate = max_t(unsigned long,
> + 500000000,
> + new_hvs_state->core_clock_rate);
> +
> + clk_set_min_rate(hvs->core_clk, core_rate);
> + }
>
> drm_atomic_helper_commit_modeset_disables(dev, state);
> -- >8 --
Thanks, I have fixed that up in my resolution.
--
Cheers,
Stephen Rothwell
Attachment:
pgprJ8MquKEU3.pgp
Description: OpenPGP digital signature
