On Wed, Jun 3, 2020 at 5:35 PM Stephen Rothwell <sfr@xxxxxxxxxxxxxxxx> wrote:
>
> Hi all,
>
> Commits
>
> 2967442ac479 ("drm/amd/display: Add DCN3 to Kconfig")
> 4e7406acd3e6 ("drm/amd/display: Add DCN3 blocks to Makefile")
> b8163750954c ("drm/amd/display: fix and simplify pipe split logic for DCN3")
> a6a7b1845598 ("drm/amdgpu: Enable DM block for DCN3")
> 5aa25fb310d5 ("drm/amd/display: Remove Unused Registers")
> ea05812d2d55 ("drm/amd/display: Handle RGBE_ALPHA Pixel Format")
> b663d733cbe1 ("drm/amd/display: Init function tables for DCN3")
> 19e1ceaeaadf ("drm/amd/display: Add DCN3 VPG")
> 889bc1fa55f5 ("drm/amd/display: Add DCN3 AFMT")
> 0e5cf8885f67 ("drm/amd/display: Add DCN3 Command Table Helpers")
> 3086e21408a6 ("drm/amd/display: Add DCN3 Resource")
> 3fbd2731be3e ("drm/amd/display: Add DCN3 Support in DM (v2)")
> 581b9589487e ("drm/amd/display: Add DCN3 HWSEQ")
> ca2e97c317ad ("drm/amd/display: Add DCN3 DMUB")
> c8728a921074 ("drm/amd/display: Add DCN3 GPIO")
> e51d66e1d338 ("drm/amd/display: Add DCN3 IRQ")
> 3ab489724031 ("drm/amd/display: Add DCN3 DML")
> 202ad3f23604 ("drm/amd/display: Add DCN3 DWB")
> 8905a0576034 ("drm/amd/display: Add DCN3 MMHUBHUB")
> 481beb130dec ("drm/amd/display: Add DCN3 HUBP")
> ee52a594ac12 ("drm/amd/display: Add DCN3 HUBHUB")
> 7dcc0bbf90d9 ("drm/amd/display: Add DCN3 DPP")
> c37075e358b6 ("drm/amd/display: Add DCN3 MPC")
> 5629c57da234 ("drm/amd/display: Add DCN3 OPP header")
> 86f1f7c7bc4f ("drm/amd/display: Add DCN3 OPTC")
> f0d3ced5769c ("drm/amd/display: Add DCN3 DCCG")
> bce3430d79d4 ("drm/amd/display: Add DCN3 CLK_MGR")
> ca1404079b72 ("drm/amd/display: Add DCN3 DIO")
> 639f7ee6f6d3 ("drm/amd/display: Add DCN3 chip ids")
> 5fa689e66bf4 ("drm/amdgpu/powerplay: add smu block for sienna_cichlid")
>
> are missing a Signed-off-by from their committer.
Fixed.
>
> Is all this new stuff really destined for v5.8?
No. 5.9.
Alex
> --
> Cheers,
> Stephen Rothwell
