On Tue, Aug 6, 2019 at 11:31 PM Jisheng Zhang
<Jisheng.Zhang@xxxxxxxxxxxxx> wrote:
>
> On Wed, 7 Aug 2019 10:56:40 +0800 Tao Zhou wrote:
>
>
> >
> >
> > readq/writeq are not supported on all architectures
> >
> > Signed-off-by: Tao Zhou <tao.zhou1@xxxxxxx>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 ++------
> > 1 file changed, 2 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > index 558fe6d091ed..7eb9e0b9235a 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > @@ -272,14 +272,10 @@ void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v,
> > */
> > uint64_t amdgpu_mm_rreg64(struct amdgpu_device *adev, uint32_t reg)
> > {
> > - uint64_t ret;
> > -
> > if ((reg * 4) < adev->rmmio_size)
> > - ret = readq(((void __iomem *)adev->rmmio) + (reg * 4));
> > + return atomic64_read((atomic64_t *)(adev->rmmio + (reg * 4)));
>
> atomic64_read doesn't equal to readq on some architectures..
What we really wanted originally was atomic64. We basically want a
read or write that is guaranteed to be 64 bits at a time.
Alex
>
> > else
> > BUG();
> > -
> > - return ret;
> > }
> >
> > /**
> > @@ -294,7 +290,7 @@ uint64_t amdgpu_mm_rreg64(struct amdgpu_device *adev, uint32_t reg)
> > void amdgpu_mm_wreg64(struct amdgpu_device *adev, uint32_t reg, uint64_t v)
> > {
> > if ((reg * 4) < adev->rmmio_size)
> > - writeq(v, ((void __iomem *)adev->rmmio) + (reg * 4));
> > + atomic64_set((atomic64_t *)(adev->rmmio + (reg * 4)), v);
> > else
> > BUG();
> > }
> > --
> > 2.17.1
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