On Sun, 24 Apr 2016 09:42:40 -0700 Guenter Roeck <linux@xxxxxxxxxxxx> wrote: > In qemu, it looks like gpmc bit 0 is considered to be the NAND chip select, > which is distinctly different to a chip ready pin. Guess I would have to try > finding a chip datasheet to figure out what this pin is supposed to do, and > what is wrong. Since it is somewhat unlikely that I'll find the time to do that, > I just disabled MTD_NAND_OMAP2 in my qemu tests instead. Not an ideal solution, > of course, but the alternative would be to drop the beagle qemu tests entirely. Here is a patch [1] which should fix your problem. It's obviously not enough to handle the different use cases we have in in the wild, but should fix your problem on the beagle board. Regards, Boris [1]http://code.bulix.org/i5c4yc-97598 -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-next" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
