Hi Greg,
Today's linux-next merge of the usb tree got a conflict in
Documentation/devicetree/bindings/phy/samsung-phy.txt between commit
ba0d7ed391b7 ("ARM: dts: enable ahci sata and sata phy for exynos5250")
from the samsung tree and commit 06fb01373cae ("phy: Add new Exynos USB
2.0 PHY driver") from the usb tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwell sfr@xxxxxxxxxxxxxxxx
diff --cc Documentation/devicetree/bindings/phy/samsung-phy.txt
index a937f75d062c,28f9edb8f19c..000000000000
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@@ -21,38 -21,56 +21,92 @@@ Required properties
- reg : offset and length of the Display Port PHY register set;
- #phy-cells : from the generic PHY bindings, must be 0;
+Samsung SATA PHY Controller
+---------------------------
+
+SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
+Each SATA PHY controller should have its own node.
+
+Required properties:
+- compatible : compatible list, contains "samsung,exynos5250-sata-phy"
+- reg : offset and length of the SATA PHY register set;
+- #phy-cells : from the generic phy bindings;
+
+Example:
+ sata_phy: sata-phy@12170000 {
+ compatible = "samsung,exynos5250-sata-phy";
+ reg = <0x12170000 0x1ff>;
+ clocks = <&clock 287>;
+ clock-names = "sata_phyctrl";
+ #phy-cells = <0>;
+ samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
+ samsung,syscon-phandle = <&pmu_syscon>;
+ };
+
+Device-Tree bindings for sataphy i2c client driver
+--------------------------------------------------
+
+Required properties:
+compatible: Should be "samsung,exynos-sataphy-i2c"
+- reg: I2C address of the sataphy i2c device.
+
+Example:
+
+ sata_phy_i2c:sata-phy@38 {
+ compatible = "samsung,exynos-sataphy-i2c";
+ reg = <0x38>;
+ };
++
+ Samsung S5P/EXYNOS SoC series USB PHY
+ -------------------------------------------------
+
+ Required properties:
+ - compatible : should be one of the listed compatibles:
+ - "samsung,exynos4210-usb2-phy"
+ - "samsung,exynos4x12-usb2-phy"
+ - "samsung,exynos5250-usb2-phy"
+ - reg : a list of registers used by phy driver
+ - first and obligatory is the location of phy modules registers
+ - samsung,sysreg-phandle - handle to syscon used to control the system registers
+ - samsung,pmureg-phandle - handle to syscon used to control PMU registers
+ - #phy-cells : from the generic phy bindings, must be 1;
+ - clocks and clock-names:
+ - the "phy" clock is required by the phy module, used as a gate
+ - the "ref" clock is used to get the rate of the clock provided to the
+ PHY module
+
+ The first phandle argument in the PHY specifier identifies the PHY, its
+ meaning is compatible dependent. For the currently supported SoCs (Exynos 4210
+ and Exynos 4212) it is as follows:
+ 0 - USB device ("device"),
+ 1 - USB host ("host"),
+ 2 - HSIC0 ("hsic0"),
+ 3 - HSIC1 ("hsic1"),
+
+ Exynos 4210 and Exynos 4212 use mode switching and require that mode switch
+ register is supplied.
+
+ Example:
+
+ For Exynos 4412 (compatible with Exynos 4212):
+
+ usbphy: phy@125b0000 {
+ compatible = "samsung,exynos4x12-usb2-phy";
+ reg = <0x125b0000 0x100>;
+ clocks = <&clock 305>, <&clock 2>;
+ clock-names = "phy", "ref";
+ status = "okay";
+ #phy-cells = <1>;
+ samsung,sysreg-phandle = <&sys_reg>;
+ samsung,pmureg-phandle = <&pmu_reg>;
+ };
+
+ Then the PHY can be used in other nodes such as:
+
+ phy-consumer@12340000 {
+ phys = <&usbphy 2>;
+ phy-names = "phy";
+ };
+
+ Refer to DT bindings documentation of particular PHY consumer devices for more
+ information about required PHYs and the way of specification.
Attachment:
pgpFYfEJk2V_m.pgp
Description: PGP signature
