Hi Chris,
Today's linux-next merge of the tile tree got a conflict in
arch/tile/kernel/single_step.c between commit cdd8e16feba8 ("arch/tile:
return SIGBUS for addresses that are unaligned AND invalid") from Linus'
tree and commit 25c5acbdcc06 ("arch/tile: support building big-endian
kernel") from the tile tree.
Just context changes. I fixed it up (see below) and can carry the fix as
necessary.
--
Cheers,
Stephen Rothwell sfr@xxxxxxxxxxxxxxxx
diff --cc arch/tile/kernel/single_step.c
index 9efbc13,8935deb..0000000
--- a/arch/tile/kernel/single_step.c
+++ b/arch/tile/kernel/single_step.c
@@@ -153,28 -153,6 +153,25 @@@ static tile_bundle_bits rewrite_load_st
if (((unsigned long)addr % size) == 0)
return bundle;
+ /*
+ * Return SIGBUS with the unaligned address, if requested.
+ * Note that we return SIGBUS even for completely invalid addresses
+ * as long as they are in fact unaligned; this matches what the
+ * tilepro hardware would be doing, if it could provide us with the
+ * actual bad address in an SPR, which it doesn't.
+ */
+ if (unaligned_fixup == 0) {
+ siginfo_t info = {
+ .si_signo = SIGBUS,
+ .si_code = BUS_ADRALN,
+ .si_addr = addr
+ };
+ trace_unhandled_signal("unaligned trap", regs,
+ (unsigned long)addr, SIGBUS);
+ force_sig_info(info.si_signo, &info, current);
+ return (tilepro_bundle_bits) 0;
+ }
+
- #ifndef __LITTLE_ENDIAN
- # error We assume little-endian representation with copy_xx_user size 2 here
- #endif
/* Handle unaligned load/store */
if (mem_op == MEMOP_LOAD || mem_op == MEMOP_LOAD_POSTINCR) {
unsigned short val_16;
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