Valdis.Kletnieks@xxxxxx wrote: > Umm.. it's not clear to *me* that it's intended to be a negative 16 bit? Or > am I just missing context not present in the patch? > > (I have no idea if the rest of the patch is OK or not, but that comment > didn't give me warm fuzzies....) Sorry, I haven't explained it well. The patch permits a 64-bit hosted assembler to represent a large 32-bit unsigned integer (such as 0xfffffff1) as a negative integer where the instruction being assembled has a signed immediate operand. For instance, the ANDI instruction on FRV takes a small signed integer (10 bits IIRC) that it sign-extends to 32-bits before using - so to clear a single low-order bit, I pass in, say, ~0x2 and the assembler represents this as a negative value. The problem was that in a 64-bit hosted assembler, the unsigned 32-bit integer gets converted to an unsigned 64-bit integer - which doesn't then appear negative (whereas in a 32-bit hosted assembler it does). David -- To unsubscribe from this list: send the line "unsubscribe linux-next" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
