Hi Tomi,
Today's linux-next merge of the omap_dss2 tree got a conflict in
drivers/video/omap2/dss/dss_features.c
drivers/video/omap2/dss/dss_features.h between commit 0b41136c0d2f
("OMAP: DSS2: DSI: Fix DSI PLL power bug") from the fbdev-current tree
and commit 0f7d043bd56b ("OMAP4: DSS2: Register configuration changes for
DSI") from the omap_dss2 tree.
I fixed it up (see below) and can carry the fix as necessary.
--
Cheers,
Stephen Rothwell sfr@xxxxxxxxxxxxxxxx
diff --cc drivers/video/omap2/dss/dss_features.c
index 8c50e18,179a7a4..0000000
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@@ -271,7 -272,8 +272,8 @@@ static struct omap_dss_features omap363
FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE |
FEAT_PRE_MULT_ALPHA | FEAT_FUNCGATED |
FEAT_ROWREPEATENABLE | FEAT_LINEBUFFERSPLIT |
- FEAT_RESIZECONF | FEAT_DSI_PLL_PWR_BUG,
- FEAT_RESIZECONF | FEAT_DSI_PLL_FREQSEL |
- FEAT_DSI_LDO_STATUS,
++ FEAT_RESIZECONF | FEAT_DSI_PLL_PWR_BUG |
++ FEAT_DSI_PLL_FREQSEL | FEAT_DSI_LDO_STATUS,
.num_mgrs = 2,
.num_ovls = 3,
diff --cc drivers/video/omap2/dss/dss_features.h
index 37922ce,c5c0b40..0000000
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/omap2/dss/dss_features.h
@@@ -26,22 -26,24 +26,25 @@@
/* DSS has feature id */
enum dss_feat_id {
- FEAT_GLOBAL_ALPHA = 1 << 0,
- FEAT_GLOBAL_ALPHA_VID1 = 1 << 1,
- FEAT_PRE_MULT_ALPHA = 1 << 2,
- FEAT_LCDENABLEPOL = 1 << 3,
- FEAT_LCDENABLESIGNAL = 1 << 4,
- FEAT_PCKFREEENABLE = 1 << 5,
- FEAT_FUNCGATED = 1 << 6,
- FEAT_MGR_LCD2 = 1 << 7,
- FEAT_LINEBUFFERSPLIT = 1 << 8,
- FEAT_ROWREPEATENABLE = 1 << 9,
- FEAT_RESIZECONF = 1 << 10,
- /* Independent core clk divider */
- FEAT_CORE_CLK_DIV = 1 << 11,
- FEAT_LCD_CLK_SRC = 1 << 12,
+ FEAT_GLOBAL_ALPHA = 1 << 0,
+ FEAT_GLOBAL_ALPHA_VID1 = 1 << 1,
+ FEAT_PRE_MULT_ALPHA = 1 << 2,
+ FEAT_LCDENABLEPOL = 1 << 3,
+ FEAT_LCDENABLESIGNAL = 1 << 4,
+ FEAT_PCKFREEENABLE = 1 << 5,
+ FEAT_FUNCGATED = 1 << 6,
+ FEAT_MGR_LCD2 = 1 << 7,
+ FEAT_LINEBUFFERSPLIT = 1 << 8,
+ FEAT_ROWREPEATENABLE = 1 << 9,
+ FEAT_RESIZECONF = 1 << 10,
- /* Independent core clk divider */
+ FEAT_CORE_CLK_DIV = 1 << 11,
+ FEAT_LCD_CLK_SRC = 1 << 12,
+ FEAT_DSI_PLL_FREQSEL = 1 << 13,
+ FEAT_DSI_LDO_STATUS = 1 << 14,
+ FEAT_DSI_DCS_CMD_CONFIG_VC = 1 << 15,
+ FEAT_DSI_VC_OCP_WIDTH = 1 << 16,
+ /* DSI-PLL power command 0x3 is not working */
- FEAT_DSI_PLL_PWR_BUG = 1 << 13,
++ FEAT_DSI_PLL_PWR_BUG = 1 << 17,
};
/* DSS register field id */
--
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