On Mon, 2011-02-07 at 21:42 +0200, George Kashperko wrote: > BCM4328 chipcommon have different CLKCTLST register HT and ALP availability > bits' layout comparing to other BCM chips. 4328 HT/ALP availability bits are > 16/17 whereas other BCM chips' HT/ALP availability bits are 17/16. Therefore > current pmu pll initialization code forces active low power clock for all > non-4328 chips instead of switching HT clock on. > Patch also fixes typo in ALP avail define description. Where did you get the knowledge that the bits are swapped on 4328 from? -- Greetings Michael. -- To unsubscribe from this list: send the line "unsubscribe linux-next" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
