I am developing a 32-bit device driver on a 32-bit OS. The device has a combination of 32-bit registers and 64-bit-wide device buffer. This is a PCI Express system, Intel CPU. I have a couple of questions. I know that my PIOs result in 32-bit reads and writes when I use readl() and writel(). This takes care of only the 32-bit registers on the device. For the 64-bit-wide device memory buffer, are there any APIs which make it possible to address them? On a slightly unrelated note, and speaking of a 32-bit system & device, how does the PCI Express Root Complex prepare Mem Write TLPs? Does each memory write access by the driver result in a single TLP with 1 DWORD of data? This seems inefficient. Suppose I write to consecutive locations, does the Root Complex generate a single Mem Write TLP with multiple DWORDS of data? Thanks in advance for any inputs. Regards, - priya -- To unsubscribe from this list: send the line "unsubscribe linux-net" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
