Tom> MSI is an edge trigger, which requires the synchronization
Tom> handshake between the hardware device and its software device
Tom> driver. For the MSI-X capability structure, the kernel
Tom> handles the synchronization by masking and unmasking the MSI
Tom> maskbits. For the MSI capability structure, the MSI maskbits
Tom> is optional. If the e1000 hardware does not support the MSI
Tom> maskbits in its MSI capability structure, I guess it could be
Tom> a race condition in e1000 hardware, which results an
Tom> unpredictable behavior.
It seems e1000 does not support the per-vector masking feature of MSI
(see full PCI header dump below).
However if I understand the x86 APIC properly, even without masking,
edge-triggered MSI interrupts should work OK. As I understand it,
when the interrupt is dispatched, its bit is moved from the IRR to the
ISR. If the same interrupt is received while the interrupt handler is
running, its bit will be set again in the IRR and it will be
dispatched again as soon as the handler exits.
It seems this should work OK for e1000 -- the chip should not generate
another MSI until the driver reads the ICR in the interrupt handler,
although it might generate an interrupt immediately afterward (while
the interrupt handler is still running).
Am I misunderstanding something? Or is there something in the
chipset's interrupt handling, outside of the CPU, that will break in
this case?
Thanks,
Roland
0000:02:0c.0 Ethernet controller: Intel Corp. 82540EM Gigabit Ethernet Controller (rev 02) Subsystem: Dell: Unknown device 0151
Flags: bus master, 66MHz, medium devsel, latency 64, IRQ 185
Memory at fcfe0000 (32-bit, non-prefetchable) [size=128K]
I/O ports at df40 [size=64]
Capabilities: [dc] Power Management version 2
Capabilities: [e4] PCI-X non-bridge device.
Capabilities: [f0] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable-
00: 86 80 0e 10 17 01 30 02 02 00 00 02 10 40 00 00
10: 00 00 fe fc 00 00 00 00 41 df 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 51 01
30: 00 00 00 00 dc 00 00 00 00 00 00 00 09 01 ff 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 e4 22 c8
e0: 00 20 00 1b 07 f0 02 00 00 00 40 04 00 00 00 00
f0: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00
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