On Thu, 1 Mar 2001, Matti Aarnio wrote: > On Wed, Feb 28, 2001 at 09:21:24PM -0500, Jeff Garzik wrote: > > Instead of unconditionally copying packet sizes over rx_copybreak, in > > many ethernet drivers... is it worth it for the driver to check and see > > if the packet is already aligned? Or is that such a rare case that it > > shouldn't be worth it? > > To know if packet is aligned or not, one must look into > the packet to analyze protocols. ..which breaks an abstraction boundary, and may not be worth the overhead. It's very rare to see non-DIX packets, but the kernel should not crash or be easily D-O-Sed from the unaligned accesses when it does happen. > IMO it is far better to setup the card to do RX DMA into > DIX aligned IP frame (the most common case), but hardware > which is inherently unable to do that has drivers knowing it. I always assume a DIX frame. For every one of my PCI drivers I receive into a + 2 offset if the hardware supports it. This is documented in the operational description at the top of the driver file. It's usually easy to tell the chip capability even without reading the documentation: for bus master drivers look for skb_reserve(skb, 2). Arbitrary Tx and Rx alignment (best) 3c59x.c For 3c900 series chips, not ancient 3c590 chips epic100.c hamachi.c yellowfin.c Tulip-like 4 byte alignment natsemi.c starfire.c tulip.c via-rhine.c Also requires align-copy on Tx! winbond-840.c The CPU must always copy ne2k-pci.c PIO rtl8139.c Must copy out of the Rx ring, and align copy on Tx. Note: For the last category the 'rx_copybreak' parameter does not exist. > My nonexhaustive list of cards says: > - Tulip: RX DMA alignment: 4 bytes > (buffer sizes have same alignment, one can't do tricks > like receive 12 bytes to the first buffer, rest to > the next) This is always the case: if the chip doesn't have the byte shifting hardware to start the Rx write to an arbitrary alignment, it doesn't have the hardware to change the alignment during the transfer. > - 3c59x: RX DMA alignment: 1 byte (all 3c90X cards) Note: not the ancient 3c590/595 cards -- throw those away if you care about performance. They were considered excellent in the days of the P5-75 processor, but that was a long time ago. > - eepro100: RX DMA alignment: unknown ! > (for lack of certain part of intel documents) This is the single case where it's not obvious by inspecting the code. The chip's capability depends on which Rx data structure is selected. And with Intel, it's always a problem of lacking documentation ;-> Donald Becker becker@scyld.com Scyld Computing Corporation http://www.scyld.com 410 Severn Ave. Suite 210 Second Generation Beowulf Clusters Annapolis MD 21403 410-990-9993 - : send the line "unsubscribe linux-net" in the body of a message to majordomo@vger.kernel.org
