Hi Rob,
Le jeu. 28 mai 2020 à 15:42, Rob Herring <robh@xxxxxxxxxx> a écrit :
On Wed, May 20, 2020 at 02:22:32AM +0200, Paul Cercueil wrote:
Convert the ingenic,pinctrl.txt doc file to ingenic,pinctrl.yaml.
In the process, some compatible strings now require a fallback, as
the
corresponding SoCs are pin-compatible with their fallback variant.
Signed-off-by: Paul Cercueil <paul@xxxxxxxxxxxxxxx>
---
Notes:
v2: - Use 'pinctrl' instead of 'pin-controller' as the node name
- remove 'additionalProperties: false' since we will have
pin conf nodes
You need to describe those nodes and not just allow anything.
These nodes don't have any constraint on their name, so I would need a
wildcard property for children nodes. That's not something I can
express in YAML right now, is it?
-Paul
.../bindings/pinctrl/ingenic,pinctrl.txt | 81 -----------
.../bindings/pinctrl/ingenic,pinctrl.yaml | 136
++++++++++++++++++
2 files changed, 136 insertions(+), 81 deletions(-)
delete mode 100644
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
create mode 100644
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
diff --git
a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
new file mode 100644
index 000000000000..5be2b1e95b36
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
@@ -0,0 +1,136 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/ingenic,pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs pin controller devicetree bindings
+
+description: >
+ Please refer to pinctrl-bindings.txt in this directory for
details of the
+ common pinctrl bindings used by client devices, including the
meaning of the
+ phrase "pin configuration node".
+
+ For the Ingenic SoCs, pin control is tightly bound with GPIO
ports. All pins
+ may be used as GPIOs, multiplexed device functions are
configured within the
+ GPIO port configuration registers and it is typical to refer to
pins using the
+ naming scheme "PxN" where x is a character identifying the GPIO
port with
+ which the pin is associated and N is an integer from 0 to 31
identifying the
+ pin within that GPIO port. For example PA0 is the first pin in
GPIO port A,
+ and PB31 is the last pin in GPIO port B. The JZ4740, the X1000
and the X1830
+ contains 4 GPIO ports, PA to PD, for a total of 128 pins. The
JZ4760, the
+ JZ4770 and the JZ4780 contains 6 GPIO ports, PA to PF, for a
total of 192
+ pins.
+
+maintainers:
+ - Paul Cercueil <paul@xxxxxxxxxxxxxxx>
+
+properties:
+ nodename:
It's $nodename as that's not a real property. And that will expose the
error in the example for you.
+ pattern: "^pinctrl@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - enum:
+ - ingenic,jz4740-pinctrl
+ - ingenic,jz4725b-pinctrl
+ - ingenic,jz4760-pinctrl
+ - ingenic,jz4770-pinctrl
+ - ingenic,jz4780-pinctrl
+ - ingenic,x1000-pinctrl
+ - ingenic,x1500-pinctrl
+ - ingenic,x1830-pinctrl
+ - items:
+ - const: ingenic,jz4760b-pinctrl
+ - const: ingenic,jz4760-pinctrl
+ - items:
+ - const: ingenic,x1000e-pinctrl
+ - const: ingenic,x1000-pinctrl
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "^gpio@[0-9]$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - ingenic,jz4740-gpio
+ - ingenic,jz4725b-gpio
+ - ingenic,jz4760-gpio
+ - ingenic,jz4770-gpio
+ - ingenic,jz4780-gpio
+ - ingenic,x1000-gpio
+ - ingenic,x1500-gpio
+ - ingenic,x1830-gpio
+
+ reg:
+ items:
+ - description: The GPIO bank number
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-ranges:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 2
+ description:
+ Refer to ../interrupt-controller/interrupts.txt for more
details.
+
+ interrupts:
+ maxItems: 1
+
+ required:
+ - compatible
+ - reg
+ - gpio-controller
+ - "#gpio-cells"
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+
+examples:
+ - |
+ pin-controller@10010000 {
+ compatible = "ingenic,jz4770-pinctrl";
+ reg = <0x10010000 0x600>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio@0 {
+ compatible = "ingenic,jz4770-gpio";
+ reg = <0>;
+
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <17>;
+ };
+ };
--
2.26.2
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