Re: [PATCH v5 27/28] mtd: rawnand: Get rid of the default ONFI timing mode

[Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>]

On Tue, 26 May 2020 21:17:24 +0200
Miquel Raynal <miquel.raynal@xxxxxxxxxxx> wrote:

> The ->choose_data_interface() hook is here for manufacturer drivers to
> provide a better timing interface than the default one, this field is
> not needed anymore.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>

Reviewed-by: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>

> ---
>  drivers/mtd/nand/raw/nand_base.c | 19 +++++--------------
>  include/linux/mtd/rawnand.h      |  9 ---------
>  2 files changed, 5 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index f14d297c50f4..2547136a9cd7 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -1010,17 +1010,15 @@ static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
>   * @iface: the data interface (can eventually be updated)
>   * @spec_timings: specific timings, when not fitting the ONFI specification
>   *
> - * If specific timings are provided, use them. Otherwise, try to retrieve
> - * supported timing modes from ONFI information. Finally, if the NAND chip does
> - * not follow the ONFI specification, rely on the ->default_timing_mode
> - * specified in the nand_ids table.
> + * If specific timings are provided, use them. Otherwise, retrieve supported
> + * timing modes from ONFI information.
>   */
>  int nand_choose_best_sdr_timings(struct nand_chip *chip,
>  				 struct nand_data_interface *iface,
>  				 struct nand_sdr_timings *spec_timings)
>  {
>  	const struct nand_controller_ops *ops = chip->controller->ops;
> -	int best_mode = 0, onfi_modes, mode, ret;
> +	int best_mode = 0, mode, ret;
>  
>  	iface->type = NAND_SDR_IFACE;
>  
> @@ -1037,13 +1035,8 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip,
>  
>  		/* Fallback to slower modes */
>  		best_mode = iface->timings.mode;
> -	} else {
> -		if (chip->parameters.onfi) {
> -			onfi_modes = chip->parameters.onfi->async_timing_mode;
> -			best_mode = fls(onfi_modes) - 1;
> -		} else {
> -			best_mode = chip->onfi_timing_mode_default;
> -		}
> +	} else if (chip->parameters.onfi) {
> +		best_mode = fls(chip->parameters.onfi->async_timing_mode) - 1;
>  	}
>  
>  	for (mode = best_mode; mode >= 0; mode--) {
> @@ -4822,8 +4815,6 @@ static bool find_full_id_nand(struct nand_chip *chip,
>  		chip->options |= type->options;
>  		chip->base.eccreq.strength = NAND_ECC_STRENGTH(type);
>  		chip->base.eccreq.step_size = NAND_ECC_STEP(type);
> -		chip->onfi_timing_mode_default =
> -					type->onfi_timing_mode_default;
>  
>  		chip->parameters.model = kstrdup(type->name, GFP_KERNEL);
>  		if (!chip->parameters.model)
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index 5bd79e853140..00557e553827 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -1070,9 +1070,6 @@ struct nand_manufacturer {
>   * @options: Various chip options. They can partly be set to inform nand_scan
>   *           about special functionality. See the defines for further
>   *           explanation.
> - * @onfi_timing_mode_default: Default ONFI timing mode. This field is set to the
> - *			      actually used ONFI mode if the chip is ONFI
> - *			      compliant or deduced from the datasheet otherwise
>   * @data_interface: NAND interface timing information
>   * @bbt_erase_shift: Number of address bits in a bbt entry
>   * @bbt_options: Bad block table specific options. All options used here must
> @@ -1120,7 +1117,6 @@ struct nand_chip {
>  	unsigned int options;
>  
>  	/* Data interface */
> -	int onfi_timing_mode_default;
>  	struct nand_data_interface data_interface;
>  
>  	/* Bad block information */
> @@ -1271,10 +1267,6 @@ nand_get_sdr_timings(struct nand_chip *chip)
>   *               @ecc_step_ds in nand_chip{}, also from the datasheet.
>   *               For example, the "4bit ECC for each 512Byte" can be set with
>   *               NAND_ECC_INFO(4, 512).
> - * @onfi_timing_mode_default: the default ONFI timing mode entered after a NAND
> - *			      reset. Should be deduced from timings described
> - *			      in the datasheet.
> - *
>   */
>  struct nand_flash_dev {
>  	char *name;
> @@ -1295,7 +1287,6 @@ struct nand_flash_dev {
>  		uint16_t strength_ds;
>  		uint16_t step_ds;
>  	} ecc;
> -	int onfi_timing_mode_default;
>  };
>  
>  int nand_create_bbt(struct nand_chip *chip);


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