Given how long this driver has been there we can safely assume that
nobody cares about PIO support. Getting rid of these macros allows for
easy register name greping.
Signed-off-by: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>
Suggested-by: Lubomir Rintel <lkundrak@xxxxx>
---
Changes in v2:
* New patch
---
drivers/mtd/nand/raw/cafe_nand.c | 134 +++++++++++++------------------
1 file changed, 58 insertions(+), 76 deletions(-)
diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c
index 022c7a3e4073..2f20032b4df7 100644
--- a/drivers/mtd/nand/raw/cafe_nand.c
+++ b/drivers/mtd/nand/raw/cafe_nand.c
@@ -175,10 +175,6 @@ module_param_array(timing, int, &numtimings, 0644);
static const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
-/* Make it easier to switch to PIO if we need to */
-#define cafe_readl(cafe, addr) readl((cafe)->mmio + CAFE_##addr)
-#define cafe_writel(cafe, datum, addr) writel(datum, (cafe)->mmio + CAFE_##addr)
-
static void cafe_write_buf(struct nand_chip *chip, const void *buf,
unsigned int len)
{
@@ -209,14 +205,14 @@ static irqreturn_t cafe_nand_interrupt(int irq, void *id)
struct mtd_info *mtd = id;
struct nand_chip *chip = mtd_to_nand(mtd);
struct cafe_priv *cafe = nand_get_controller_data(chip);
- u32 irqs = cafe_readl(cafe, NAND_IRQ);
- cafe_writel(cafe,
- irqs & ~(CAFE_NAND_IRQ_CMD_DONE | CAFE_NAND_IRQ_DMA_DONE),
- NAND_IRQ);
+ u32 irqs = readl(cafe->mmio + CAFE_NAND_IRQ);
+ writel(irqs & ~(CAFE_NAND_IRQ_CMD_DONE | CAFE_NAND_IRQ_DMA_DONE),
+ cafe->mmio + CAFE_NAND_IRQ);
if (!irqs)
return IRQ_NONE;
- dev_dbg(&cafe->pdev->dev, "irq, bits %x (%x)\n", irqs, cafe_readl(cafe, NAND_IRQ));
+ dev_dbg(&cafe->pdev->dev, "irq, bits %x (%x)\n", irqs,
+ readl(cafe->mmio + CAFE_NAND_IRQ));
return IRQ_HANDLED;
}
@@ -250,8 +246,8 @@ static int cafe_nand_read_page(struct nand_chip *chip, u8 *buf,
u32 ecc_result, status;
dev_dbg(&cafe->pdev->dev, "ECC result %08x SYN1,2 %08x\n",
- cafe_readl(cafe, NAND_ECC_RESULT),
- cafe_readl(cafe, NAND_ECC_SYN_REG(0)));
+ readl(cafe->mmio + CAFE_NAND_ECC_RESULT),
+ readl(cafe->mmio + CAFE_NAND_ECC_SYN_REG(0)));
nand_read_page_op(chip, page, 0, pagebuf,
mtd->writesize + mtd->oobsize);
@@ -259,7 +255,7 @@ static int cafe_nand_read_page(struct nand_chip *chip, u8 *buf,
if (buf != pagebuf)
memcpy(buf, pagebuf, mtd->writesize);
- ecc_result = cafe_readl(cafe, NAND_ECC_RESULT);
+ ecc_result = readl(cafe->mmio + CAFE_NAND_ECC_RESULT);
status = CAFE_FIELD_GET(NAND_ECC_RESULT, STATUS, ecc_result);
if (checkecc && status == CAFE_NAND_ECC_RESULT_CORRECTABLE_ERRS) {
unsigned short syn[8], pat[4];
@@ -268,7 +264,7 @@ static int cafe_nand_read_page(struct nand_chip *chip, u8 *buf,
int i, n;
for (i=0; i<8; i+=2) {
- u32 tmp = cafe_readl(cafe, NAND_ECC_SYN_REG(i));
+ u32 tmp = readl(cafe->mmio + CAFE_NAND_ECC_SYN_REG(i));
u16 idx;
idx = FIELD_GET(CAFE_NAND_ECC_SYN_FIELD(i), tmp);
@@ -315,10 +311,12 @@ static int cafe_nand_read_page(struct nand_chip *chip, u8 *buf,
}
if (n < 0) {
- dev_dbg(&cafe->pdev->dev, "Failed to correct ECC at %08x\n",
- cafe_readl(cafe, NAND_ADDR2) * 2048);
+ dev_dbg(&cafe->pdev->dev,
+ "Failed to correct ECC at %08x\n",
+ readl(cafe->mmio + CAFE_NAND_ADDR2) * 2048);
for (i = 0; i < 0x5c; i += 4)
- printk("Register %x: %08x\n", i, readl(cafe->mmio + i));
+ printk("Register %x: %08x\n", i,
+ readl(cafe->mmio + i));
mtd->ecc_stats.failed++;
} else {
dev_dbg(&cafe->pdev->dev, "Corrected %d symbol errors\n", n);
@@ -494,11 +492,11 @@ static int cafe_nand_attach_chip(struct nand_chip *chip)
return -ENOMEM;
/* Set up DMA address */
- cafe_writel(cafe, lower_32_bits(cafe->dmaaddr), NAND_DMA_ADDR0);
- cafe_writel(cafe, upper_32_bits(cafe->dmaaddr), NAND_DMA_ADDR1);
+ writel(lower_32_bits(cafe->dmaaddr), cafe->mmio + CAFE_NAND_DMA_ADDR0);
+ writel(upper_32_bits(cafe->dmaaddr), cafe->mmio + CAFE_NAND_DMA_ADDR1);
dev_dbg(&cafe->pdev->dev, "Set DMA address to %x (virt %p)\n",
- cafe_readl(cafe, NAND_DMA_ADDR0), cafe->dmabuf);
+ readl(cafe->mmio + CAFE_NAND_DMA_ADDR0), cafe->dmabuf);
/* Restore the DMA flag */
cafe->usedma = usedma;
@@ -589,8 +587,8 @@ static int cafe_nand_exec_subop(struct nand_chip *chip,
ctrl1 |= CAFE_NAND_CTRL1_HAS_ADDR |
CAFE_FIELD_PREP(NAND_CTRL1, NUM_ADDR_CYC,
instr->ctx.addr.naddrs - 1);
- cafe_writel(cafe, addr1, NAND_ADDR1);
- cafe_writel(cafe, addr2, NAND_ADDR2);
+ writel(addr1, cafe->mmio + CAFE_NAND_ADDR1);
+ writel(addr2, cafe->mmio + CAFE_NAND_ADDR2);
break;
case NAND_OP_DATA_IN_INSTR:
@@ -615,8 +613,8 @@ static int cafe_nand_exec_subop(struct nand_chip *chip,
}
if (data_instr >= 0)
- cafe_writel(cafe, nand_subop_get_data_len(subop, data_instr),
- NAND_DATA_LEN);
+ writel(nand_subop_get_data_len(subop, data_instr),
+ cafe->mmio + CAFE_NAND_DATA_LEN);
if (cafe->usedma && data_instr >= 0) {
u32 dmactrl = CAFE_NAND_DMA_CTRL_ENABLE |
@@ -628,7 +626,7 @@ static int cafe_nand_exec_subop(struct nand_chip *chip,
if (ctrl1 & CAFE_NAND_CTRL1_HAS_DATA_IN)
dmactrl |= CAFE_NAND_DMA_CTRL_DATA_IN;
- cafe_writel(cafe, dmactrl, NAND_DMA_CTRL);
+ writel(dmactrl, cafe->mmio + CAFE_NAND_DMA_CTRL);
/*
* If the last instruction is a data transfer and we're using
@@ -642,10 +640,10 @@ static int cafe_nand_exec_subop(struct nand_chip *chip,
}
/* Clear the pending interrupts before starting the operation. */
- cafe_writel(cafe, wait, NAND_IRQ);
+ writel(wait, cafe->mmio + CAFE_NAND_IRQ);
- cafe_writel(cafe, ctrl2, NAND_CTRL2);
- cafe_writel(cafe, ctrl1, NAND_CTRL1);
+ writel(ctrl2, cafe->mmio + CAFE_NAND_CTRL2);
+ writel(ctrl1, cafe->mmio + CAFE_NAND_CTRL1);
ret = readl_poll_timeout(cafe->mmio + CAFE_NAND_IRQ, status,
(status & wait) == wait, 1, USEC_PER_SEC);
@@ -695,17 +693,17 @@ static void cafe_nand_init(struct cafe_priv *cafe)
u32 ctrl;
/* Start off by resetting the NAND controller completely */
- cafe_writel(cafe, CAFE_GLOBAL_RESET_NAND, GLOBAL_RESET);
- cafe_writel(cafe, 0, GLOBAL_RESET);
- cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);
+ writel(CAFE_GLOBAL_RESET_NAND, cafe->mmio + CAFE_GLOBAL_RESET);
+ writel(0, cafe->mmio + CAFE_GLOBAL_RESET);
+ writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK);
/* Restore timing configuration */
- cafe_writel(cafe, timing[0], NAND_TIMING1);
- cafe_writel(cafe, timing[1], NAND_TIMING2);
- cafe_writel(cafe, timing[2], NAND_TIMING3);
+ writel(timing[0], cafe->mmio + CAFE_NAND_TIMING1);
+ writel(timing[1], cafe->mmio + CAFE_NAND_TIMING2);
+ writel(timing[2], cafe->mmio + CAFE_NAND_TIMING3);
/* Disable master reset, enable NAND clock */
- ctrl = cafe_readl(cafe, GLOBAL_CTRL);
+ ctrl = readl(cafe->mmio + CAFE_GLOBAL_CTRL);
ctrl &= ~(CAFE_GLOBAL_SW_RESET_SET |
CAFE_GLOBAL_SW_RESET_CLEAR |
CAFE_GLOBAL_MASTER_RESET_SET |
@@ -714,45 +712,31 @@ static void cafe_nand_init(struct cafe_priv *cafe)
ctrl |= CAFE_GLOBAL_NAND_CLK_ENABLE |
CAFE_GLOBAL_SDH_CLK_ENABLE |
CAFE_GLOBAL_CCIC_CLK_ENABLE;
- cafe_writel(cafe,
- ctrl |
- CAFE_GLOBAL_MASTER_RESET_SET |
- CAFE_GLOBAL_SW_RESET_SET,
- GLOBAL_CTRL);
- cafe_writel(cafe,
- ctrl |
- CAFE_GLOBAL_MASTER_RESET_CLEAR |
- CAFE_GLOBAL_SW_RESET_CLEAR,
- GLOBAL_CTRL);
+ writel(ctrl | CAFE_GLOBAL_MASTER_RESET_SET | CAFE_GLOBAL_SW_RESET_SET,
+ cafe->mmio + CAFE_GLOBAL_CTRL);
+ writel(ctrl | CAFE_GLOBAL_MASTER_RESET_CLEAR |
+ CAFE_GLOBAL_SW_RESET_CLEAR,
+ cafe->mmio + CAFE_GLOBAL_CTRL);
- cafe_writel(cafe, 0, NAND_DMA_CTRL);
+ writel(0, cafe->mmio + CAFE_NAND_DMA_CTRL);
- cafe_writel(cafe,
- CAFE_GLOBAL_NAND_CLK_ENABLE |
- CAFE_GLOBAL_SDH_CLK_ENABLE |
- CAFE_GLOBAL_CCIC_CLK_ENABLE |
- CAFE_GLOBAL_MASTER_RESET_SET |
- CAFE_GLOBAL_SW_RESET_CLEAR,
- GLOBAL_CTRL);
- cafe_writel(cafe,
- CAFE_GLOBAL_NAND_CLK_ENABLE |
- CAFE_GLOBAL_SDH_CLK_ENABLE |
- CAFE_GLOBAL_CCIC_CLK_ENABLE |
- CAFE_GLOBAL_MASTER_RESET_CLEAR |
- CAFE_GLOBAL_SW_RESET_CLEAR,
- GLOBAL_CTRL);
+ writel(CAFE_GLOBAL_NAND_CLK_ENABLE | CAFE_GLOBAL_SDH_CLK_ENABLE |
+ CAFE_GLOBAL_CCIC_CLK_ENABLE | CAFE_GLOBAL_MASTER_RESET_SET |
+ CAFE_GLOBAL_SW_RESET_CLEAR,
+ cafe->mmio + CAFE_GLOBAL_CTRL);
+ writel(CAFE_GLOBAL_NAND_CLK_ENABLE | CAFE_GLOBAL_SDH_CLK_ENABLE |
+ CAFE_GLOBAL_CCIC_CLK_ENABLE | CAFE_GLOBAL_MASTER_RESET_CLEAR |
+ CAFE_GLOBAL_SW_RESET_CLEAR,
+ cafe->mmio + CAFE_GLOBAL_CTRL);
/* Set up DMA address */
- cafe_writel(cafe, lower_32_bits(cafe->dmaaddr), NAND_DMA_ADDR0);
- cafe_writel(cafe, upper_32_bits(cafe->dmaaddr), NAND_DMA_ADDR1);
+ writel(lower_32_bits(cafe->dmaaddr), cafe->mmio + CAFE_NAND_DMA_ADDR0);
+ writel(upper_32_bits(cafe->dmaaddr), cafe->mmio + CAFE_NAND_DMA_ADDR1);
/* Enable NAND IRQ in global IRQ mask register */
- cafe_writel(cafe,
- CAFE_GLOBAL_IRQ_PCI_ERROR |
- CAFE_GLOBAL_IRQ_CCIC |
- CAFE_GLOBAL_IRQ_SDH |
- CAFE_GLOBAL_IRQ_NAND,
- GLOBAL_IRQ_MASK);
+ writel(CAFE_GLOBAL_IRQ_PCI_ERROR | CAFE_GLOBAL_IRQ_CCIC |
+ CAFE_GLOBAL_IRQ_SDH | CAFE_GLOBAL_IRQ_NAND,
+ cafe->mmio + CAFE_GLOBAL_IRQ_MASK);
}
static int cafe_nand_probe(struct pci_dev *pdev,
@@ -808,9 +792,9 @@ static int cafe_nand_probe(struct pci_dev *pdev,
dev_dbg(&cafe->pdev->dev, "Using provided timings (%08x %08x %08x)\n",
timing[0], timing[1], timing[2]);
} else {
- timing[0] = cafe_readl(cafe, NAND_TIMING1);
- timing[1] = cafe_readl(cafe, NAND_TIMING2);
- timing[2] = cafe_readl(cafe, NAND_TIMING3);
+ timing[0] = readl(cafe->mmio + CAFE_NAND_TIMING1);
+ timing[1] = readl(cafe->mmio + CAFE_NAND_TIMING2);
+ timing[2] = readl(cafe->mmio + CAFE_NAND_TIMING3);
if (timing[0] | timing[1] | timing[2]) {
dev_dbg(&cafe->pdev->dev, "Timing registers already set (%08x %08x %08x)\n",
@@ -854,9 +838,8 @@ static int cafe_nand_probe(struct pci_dev *pdev,
nand_cleanup(&cafe->nand);
out_irq:
/* Disable NAND IRQ in global IRQ mask register */
- cafe_writel(cafe,
- cafe_readl(cafe, GLOBAL_IRQ_MASK) & ~CAFE_GLOBAL_IRQ_NAND,
- GLOBAL_IRQ_MASK);
+ writel(readl(cafe->mmio + CAFE_GLOBAL_IRQ_MASK) & ~CAFE_GLOBAL_IRQ_NAND,
+ cafe->mmio + CAFE_GLOBAL_IRQ_MASK);
out_ior:
pci_iounmap(pdev, cafe->mmio);
return err;
@@ -869,9 +852,8 @@ static void cafe_nand_remove(struct pci_dev *pdev)
struct cafe_priv *cafe = nand_get_controller_data(chip);
/* Disable NAND IRQ in global IRQ mask register */
- cafe_writel(cafe,
- cafe_readl(cafe, GLOBAL_IRQ_MASK) & ~CAFE_GLOBAL_IRQ_NAND,
- GLOBAL_IRQ_MASK);
+ writel(readl(cafe->mmio + CAFE_GLOBAL_IRQ_MASK) & ~CAFE_GLOBAL_IRQ_NAND,
+ cafe->mmio + CAFE_GLOBAL_IRQ_MASK);
nand_release(chip);
free_rs(cafe->rs);
pci_iounmap(pdev, cafe->mmio);
--
2.25.3
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[PATCH v2 18/19] mtd: rawnand: cafe: Drop the cafe_{readl, writel}() wrappers
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- Subject: [PATCH v2 18/19] mtd: rawnand: cafe: Drop the cafe_{readl, writel}() wrappers
- From: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>
- Date: Tue, 5 May 2020 12:13:52 +0200
- Cc: Richard Weinberger <richard@xxxxxx>, Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>, Vignesh Raghavendra <vigneshr@xxxxxx>, Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx>
- In-reply-to: <20200505101353.1776394-1-boris.brezillon@collabora.com>
- References: <20200505101353.1776394-1-boris.brezillon@collabora.com>
- Follow-Ups:
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- References:
- [PATCH v2 00/19] mtd: rawnand: cafe: Convert to exec_op() (and more)
- From: Boris Brezillon
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