Re: [PATCH] Revert "mtd: rawnand: denali: get ->setup_data_interface() working again"

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Hi Marek,

Marek Vasut <marex@xxxxxxx> wrote on Wed,  5 Feb 2020 08:08:34 +0100:

> This reverts commit d311e0c27b8fcc27f707f8cac48cd8bdc4155224, which
> completely breaks NAND access on Altera SoCFPGA (detected on ArriaV
> SoC).
> 
> On SoCFPGA, denali->clk_rate = 31.25 MHz and denali->clk_x_rate = 125 MHz,
> hence the driver sets NAND_KEEP_TIMINGS flag. This did not happen before
> and is actually incorrect, as on SoCFPGA we do not want to retain timings
> from previous stage (the timings might be incorrect or outright invalid).
> 
> Cc: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>
> Cc: Dinh Nguyen <dinguyen@xxxxxxxxxx>
> Cc: Masahiro Yamada <masahiroy@xxxxxxxxxx>
> Cc: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
> Cc: Tim Sander <tim@xxxxxxxxxxxxxxx>
> To: linux-mtd <linux-mtd@xxxxxxxxxxxxxxxxxxx>
> ---
>  drivers/mtd/nand/raw/denali.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
> index b6c463d02167..5fe3c62a756e 100644
> --- a/drivers/mtd/nand/raw/denali.c
> +++ b/drivers/mtd/nand/raw/denali.c
> @@ -1209,7 +1209,7 @@ int denali_chip_init(struct denali_controller *denali,
>  	}
>  
>  	/* clk rate info is needed for setup_data_interface */
> -	if (!denali->clk_rate || !denali->clk_x_rate)

I don't get it, if both clk_rate and clk_x_rate are set, the if
condition will not be entered, right?

> +	if (denali->clk_rate && denali->clk_x_rate)
>  		chip->options |= NAND_KEEP_TIMINGS;


Thanks,
Miquèl

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