On Fri, 2019-12-20 at 11:31:52 UTC, Masahiro Yamada wrote: > From: Marek Vasut <marex@xxxxxxx> > > The SPARE_AREA_SKIP_BYTES register is reset when the controller reset > signal is toggled. Yet, this register must be configured to match the > content of the NAND OOB area. The current default value is always set > to 8 and is programmed into the hardware in case the hardware was not > programmed before (e.g. in a bootloader) with a different value. This > however does not work when the block is reset properly by Linux. > > On Altera SoCFPGA CycloneV, ArriaV and Arria10, which are the SoCFPGA > platforms which support booting from NAND, the SPARE_AREA_SKIP_BYTES > value must be set to 2. On Socionext Uniphier, the value is 8. This > patch adds support for preconfiguring the default value and handles > the special SoCFPGA case by setting the default to 2 on all SoCFPGA > platforms, while retaining the original behavior and default value of > 8 on all the other platforms. > > Signed-off-by: Marek Vasut <marex@xxxxxxx> > Cc: Miquel Raynal <miquel.raynal@xxxxxxxxxxx> > Cc: Richard Weinberger <richard@xxxxxx> > Cc: Vignesh Raghavendra <vigneshr@xxxxxx> > To: linux-mtd@xxxxxxxxxxxxxxxxxxx > Reviewed-by: Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx> > Acked-by: Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx> Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks. Miquel ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/