Re: [PATCH 2/3] mtd: spi-nor: Support TB selection using SR bit 6

[Jungseung Lee <js07.lee@xxxxxxxxxxx>]

2019-12-11 (Tue), 07:28 +0000, Tudor.Ambarus@xxxxxxxxxxxxx:
> 
> On 12/11/19 8:47 AM, Jungseung Lee wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you
> > know the content is safe
> > 
> > Hi, Tudor
> > 2019-12-10 (Tue), 17:08 +0000, Tudor.Ambarus@xxxxxxxxxxxxx:
> > > Hi, Jungseung,
> > > 
> > > It's great to see this happen :).
> > > 
> > > On 12/2/19 8:35 AM, Jungseung Lee wrote:
> > > > 
> > > > There are some flashes to use bit 6 of status register for
> > > > Top/Bottom (TB).
> > > 
> > > What flashes are using the 6th bit of the SR as TB? Is something
> > > that
> > > we can
> > > generalize per manufacturer? I'm thinking of using a SNOR_F
> > > instead.
> > > 
> > 
> > Thanks for your comment.
> > 
> > Actually, I failed to find some generalized way to know which bit
> > is
> > used for TB.
> > 
> > I was able to find some pattern that it was affected by capacity.
> > 
> > Winbond : Use the 6th bit from 32MB capacity
> > W25Q20EW, W25Q50BW, W25Q128V - TB(5)
> > W25Q256JV, W25M512JV - TB(6)
> > 
> > GigaDevice : Use the 6th bit from 32MB capacity
> > GD25Q16C, GD25Q32C, GD25LQ32D, GD25Q64C, GD25Q128 - TB(5)
> > GD25Q256 - TB(6)
> > 
> > Micron/STM : Keep to use 5th bit
> > M25PX64, N25Q128A, N25Q512A, MT25QL512ABB, MT25QL02GCBB - TB(5)
> 
> They keep TB at BIT(5) and define BP3 at BIT(6).
> 
> > 
> > Spansion : Use the 6th bit from 16MB capacity
> > S25FL116K, S25FL132K, S25FL165K - TB(5)
> > S25FL128L, S25FL256L - TB(6)
> 
> While spansion defines BP3 at BIT(5) and TB at BIT(6). I hoped that
> at least we
> could made a correlation between TB and BP3, i.e. assume that if BP3
> is defined
> then TB will be at BIT(6), but we can't do this. What a mess.
Yeah, Really.

> > 
> > Some of manufacturer use 6th bit for some flashes, that is probably
> > some cases to need additional BP bit (BP3).
> > 
> > Anyway it was hard to find anything that could be normalized.
> > That's
> > why I add SPI_NOR_TB_SR_BIT6 that could be set on each flash info.
> > 
> 
> Yeah, makes sense. The explanations from above should fit in the
> commit message,
> but I think I can amend it when applying.
I really appreicate if you can do it.

> 
> Thanks,
> ta
Best Regards,
Jungseung Lee


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