On 02-Nov-19 4:53 PM, Tudor.Ambarus@xxxxxxxxxxxxx wrote: > From: Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx> > > Make sure that when doing a lock() or an unlock() operation we don't clear > the QE bit from Status Register 2. > > JESD216 revB or later offers information about the *default* Status > Register commands to use (see BFPT DWORDS[15], bits 22:20). In this > standard, Status Register 1 refers to the first data byte transferred on a > Read Status (05h) or Write Status (01h) command. Status register 2 refers > to the byte read using instruction 35h. Status register 2 is the second > byte transferred in a Write Status (01h) command. > > Industry naming and definitions of these Status Registers may differ. > The definitions are described in JESD216B, BFPT DWORDS[15], bits 22:20. > There are cases in which writing only one byte to the Status Register 1 > has the side-effect of clearing Status Register 2 and implicitly the Quad > Enable bit. This side-effect is hit just by the > BFPT_DWORD15_QER_SR2_BIT1_BUGGY and BFPT_DWORD15_QER_SR2_BIT1 cases. > But I see that 1 byte SR1 write still happens as part of spi_nor_clear_sr_bp() until patch 20/20. So is this only a partial fix? Should this patch be rearranged to appear along with 20/20? > Suggested-by: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx> > Signed-off-by: Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx> > --- > drivers/mtd/spi-nor/spi-nor.c | 120 ++++++++++++++++++++++++++++++++++++++++-- > include/linux/mtd/spi-nor.h | 3 ++ > 2 files changed, 118 insertions(+), 5 deletions(-) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index 725dab241271..f96bc80c0ed1 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -959,12 +959,19 @@ static int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len) > return spi_nor_wait_till_ready(nor); > } > [...] > +/** > * spi_nor_write_sr2() - Write the Status Register 2 using the > * SPINOR_OP_WRSR2 (3eh) command. > * @nor: pointer to 'struct spi_nor'. > @@ -3634,19 +3723,38 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, > break; > > case BFPT_DWORD15_QER_SR2_BIT1_BUGGY: > + /* > + * Writing only one byte to the Status Register has the > + * side-effect of clearing Status Register 2. > + */ > case BFPT_DWORD15_QER_SR2_BIT1_NO_RD: > + /* > + * Read Configuration Register (35h) instruction is not > + * supported. > + */ > + nor->flags |= SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR; Since SNOR_F_HAS_16BIT_SR is set by default in spi_nor_info_init_params(), no need to set the flag here again > params->quad_enable = spansion_no_read_cr_quad_enable; > break; > > case BFPT_DWORD15_QER_SR1_BIT6: > + nor->flags &= ~SNOR_F_HAS_16BIT_SR; > params->quad_enable = macronix_quad_enable; > break; > > case BFPT_DWORD15_QER_SR2_BIT7: > + nor->flags &= ~SNOR_F_HAS_16BIT_SR; > params->quad_enable = sr2_bit7_quad_enable; > break; > > case BFPT_DWORD15_QER_SR2_BIT1: > + /* > + * JESD216 rev B or later does not specify if writing only one > + * byte to the Status Register clears or not the Status > + * Register 2, so let's be cautious and keep the default > + * assumption of a 16-bit Write Status (01h) command. > + */ > + nor->flags |= SNOR_F_HAS_16BIT_SR; > + Same here... > params->quad_enable = spansion_read_cr_quad_enable; > break; > > @@ -4613,6 +4721,8 @@ static void spi_nor_info_init_params(struct spi_nor *nor) > params->quad_enable = spansion_read_cr_quad_enable; > params->set_4byte = spansion_set_4byte; > params->setup = spi_nor_default_setup; > + /* Default to 16-bit Write Status (01h) Command */ > + nor->flags |= SNOR_F_HAS_16BIT_SR; > > /* Set SPI NOR sizes. */ > params->size = (u64)info->sector_size * info->n_sectors; > diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h > index d1d736d3c8ab..d6ec55cc6d97 100644 > --- a/include/linux/mtd/spi-nor.h > +++ b/include/linux/mtd/spi-nor.h > @@ -243,6 +243,9 @@ enum spi_nor_option_flags { > SNOR_F_4B_OPCODES = BIT(6), > SNOR_F_HAS_4BAIT = BIT(7), > SNOR_F_HAS_LOCK = BIT(8), > + SNOR_F_HAS_16BIT_SR = BIT(9), > + SNOR_F_NO_READ_CR = BIT(10), > + > }; > > /** > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/