The 09/25/2019 16:52, Piotr Sroka wrote:
Driver for Cadence HPNFC NAND flash controller. HW DMA interface Page write and page read operations are executed in Command DMA mode. Commands are defined by DMA descriptors. In CDMA mode controller own DMA engine is used (Master DMA mode). Other operations defined by nand_op_instr are executed in "Generic" mode. In that mode data can be transferred only in by Slave DMA interface. Slave DMA interface can be connected directly to AXI or to an external DMA engine.
Please ignore that email.
Thanks Piotr ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
