> -----Original Message----- > From: linux-mtd <linux-mtd-bounces@xxxxxxxxxxxxxxxxxxx> On Behalf Of > Tudor.Ambarus@xxxxxxxxxxxxx > Sent: Tuesday, August 27, 2019 5:34 PM > To: Ashish Kumar <ashish.kumar@xxxxxxx>; marek.vasut@xxxxxxxxx; > dwmw2@xxxxxxxxxxxxx; computersforpeace@xxxxxxxxx; > miquel.raynal@xxxxxxxxxxx; richard@xxxxxx; vigneshr@xxxxxx; linux- > mtd@xxxxxxxxxxxxxxxxxxx > Cc: Kuldeep Singh <kuldeep.singh@xxxxxxx>; linux-kernel@xxxxxxxxxxxxxxx > Subject: [EXT] Re: [Patch v3] drivers: mtd: spi-nor: Add flash property for > mt25qu512a and mt35xu02g > > Caution: EXT Email > > Hi, Ashish, > > On 08/13/2019 01:38 PM, Ashish Kumar wrote: > > External E-Mail > > > > > > mt25qu512a is rebranded after its spinoff from STM, so it is different > > only in term of operating frequency, initial JEDEC id is same as that > > of n25q512a. In order to avoid any confussion with respect to name new > > entry is added. > > This flash is tested for Single I/O and QUAD I/O mode on LS1046FRWY. > > > > mt35xu02g is Octal flash supporting Single I/O and QCTAL I/O and it > > has been tested on LS1028ARDB > > > > Signed-off-by: Kuldeep Singh <kuldeep.singh@xxxxxxx> > > Signed-off-by: Ashish Kumar <ashish.kumar@xxxxxxx> > > --- > > v3: > > -Reword commits msg > > -rebase to top of mtd-linux spi-nor/next > > v2: > > Incorporate review comments from Vignesh > > > > drivers/mtd/spi-nor/spi-nor.c | 9 +++++++++ > > 1 file changed, 9 insertions(+) > > > > diff --git a/drivers/mtd/spi-nor/spi-nor.c > > b/drivers/mtd/spi-nor/spi-nor.c index 03cc788..97d3de8 100644 > > --- a/drivers/mtd/spi-nor/spi-nor.c > > +++ b/drivers/mtd/spi-nor/spi-nor.c > > @@ -1988,6 +1988,12 @@ static const struct flash_info spi_nor_ids[] = { > > { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | > SPI_NOR_QUAD_READ) }, > > { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > > { "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512, SECT_4K | > > SPI_NOR_QUAD_READ) }, > > + > > + /* Micron */ > > + { "mt25qu512a", INFO6(0x20bb20, 0x104400, 64 * 1024, 1024, SECT_4K | > > + USE_FSR | SPI_NOR_DUAL_READ | > > + SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) > > + }, > > I'm looking at the following datasheets: mt25qu512a [1] and n25q512a [2]. > Both flashes have the same Extended Device ID data. What will happen, is > that you'll always hit the first valid entry, so "mt25qu512a", and you'll indicate > a 'wrong' flash name for n25q512a. If there is nothing that differentiate > between the two, maybe you can add a comment in the code that says that > "n25q512a" was re-branded to "mt25qu512a" after the STM spin-off. > Whatever solution will be, it will be better if you do it in a separate patch. Hi Tudor, Considering both are same, should I rename to mt25qu51a, and add SPI_NOR_4B_OPCODES or Keep n25q512a, and comment about mt25qu51a and add SPI_NOR_4B_OPCODES. For separate patch comment you mean split mt25qu512a and mt35xu02g into 2 patch. > > [1] > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fstatic > 6.arrow.com%2Faropdfconversion%2F1a8b08cb08427821f166137d064c4837e > ca70f15%2F12682797700728481268266842945946mt25q_qlkt_u_512_abb_0.p > df.pdf&data=02%7C01%7Cashish.kumar%40nxp.com%7C26e59cbcfac14 > 8e5218c08d72ae6c46b%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7 > C637025042940681828&sdata=gWBeML98ws80FAnwA7nvB4qvVbFWUa > YTyr8PV6IUP3A%3D&reserved=0 > > [2] > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww > .google.com%2Furl%3Fsa%3Dt%26rct%3Dj%26q%3D%26esrc%3Ds%26source > %3Dweb%26cd%3D1%26cad%3Drja%26uact%3D8%26ved%3D2ahUKEwjZlJ_ > M_KLkAhWB66QKHV6WAX4QFjAAegQIAhAC%26url%3Dhttps%253A%252F% > 252Fwww.micron.com%252F- > %252Fmedia%252Fdocuments%252Fproducts%252Fdata-sheet%252Fnor- > flash%252Fserial- > nor%252Fn25q%252Fn25q_512mb_1_8v_65nm.pdf%26usg%3DAOvVaw3BSi > UIfTgikFZ0FZ7O_D61&data=02%7C01%7Cashish.kumar%40nxp.com%7C > 26e59cbcfac148e5218c08d72ae6c46b%7C686ea1d3bc2b4c6fa92cd99c5c30163 > 5%7C0%7C1%7C637025042940681828&sdata=0bbEjEbOWQJfVYhDjBx55 > d6YkDzgR2fP2XBurJvDrMU%3D&reserved=0 > > > + > > { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | > SPI_NOR_QUAD_READ) }, > > { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR > | SPI_NOR_QUAD_READ) }, > > { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | > SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > > @@ -2003,6 +2009,9 @@ static const struct flash_info spi_nor_ids[] = { > > SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | > > SPI_NOR_4B_OPCODES) > > }, > > + { "mt35xu02g", INFO(0x2c5b1c, 0, 128 * 1024, 2048, > > + SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | > > + SPI_NOR_4B_OPCODES) }, > > Is there a public datasheet for this flash? No, data sheet in under NDA, I have asked micron FAE for public data sheet, will resend after the same is published. Regards Ashish > > Cheers, > ta > ______________________________________________________ > Linux MTD discussion mailing list > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Flists.in > fradead.org%2Fmailman%2Flistinfo%2Flinux- > mtd%2F&data=02%7C01%7Cashish.kumar%40nxp.com%7C26e59cbcfac > 148e5218c08d72ae6c46b%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1 > %7C637025042940681828&sdata=rNBZ%2B0F%2BW8Oxr55LGfABHLZSM > M4neUMW8kinK1qh6eo%3D&reserved=0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/