From: Shivamurthy Shastri <sshivamurthy@xxxxxxxxxx> M70A series flashes by default enable continuous read feature (BIT0 in configuration register). This feature will not expose the ECC to host and causing read failure. Signed-off-by: Shivamurthy Shastri <sshivamurthy@xxxxxxxxxx> --- drivers/mtd/nand/spi/micron.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c index 6fde93ec23a1..1e28ea3d1362 100644 --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c @@ -127,6 +127,15 @@ static int micron_spinand_detect(struct spinand_device *spinand) return 1; } +static int micron_spinand_init(struct spinand_device *spinand) +{ + /* + * Some of the Micron flashes enable this BIT by default, + * and there is a chance of read failure due to this. + */ + return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE, 0); +} + static void micron_fixup_param_page(struct spinand_device *spinand, struct nand_onfi_params *p) { @@ -150,6 +159,7 @@ static void micron_fixup_param_page(struct spinand_device *spinand, static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = { .detect = micron_spinand_detect, + .init = micron_spinand_init, .fixup_param_page = micron_fixup_param_page, }; -- 2.17.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/