On Tue, Jun 25, 2019 at 06:46:29AM +0200, Naga Sureshkumar Relli wrote: > --- a/drivers/mtd/nand/raw/nand_micron.c > +++ b/drivers/mtd/nand/raw/nand_micron.c > @@ -500,8 +500,11 @@ static int micron_nand_init(struct nand_chip *chip) > chip->ecc.size = 512; > chip->ecc.strength = chip->base.eccreq.strength; > chip->ecc.algo = NAND_ECC_BCH; > - chip->ecc.read_page = micron_nand_read_page_on_die_ecc; > - chip->ecc.write_page = micron_nand_write_page_on_die_ecc; > + if (!chip->ecc.read_page) > + chip->ecc.read_page = micron_nand_read_page_on_die_ecc; > + > + if (!chip->ecc.write_page) > + chip->ecc.write_page = micron_nand_write_page_on_die_ecc; When used with pl353_nand.c, this change prioritizes the pl353_nand_read_page_raw/pl353_nand_write_page_raw implementations over micron_nand_read_page_on_die_ecc/micron_nand_write_page_on_die_ecc. The pl353 implementations don't check the status register of the flash for NAND_ECC_STATUS_WRITE_RECOMMENDED nor do they update ecc_stats.failed in any way. Unless I am mistaken, this implies that bitflips cannot be detected at all anymore. However, this is the change that makes a MT29F2G08ABAEAWP practically work with jffs2 on the Zynq platform. In this context, I countered a document from Micron[1] indicating that their on-die chips are incompatible with jffs2 as is, because the on-die oob layout is incompatible with jffs2. I suppose that using the raw variants puts jffs2 in full control of the oob area, but is this really the correct solution? Helmut [1] https://www.micron.com/~/media/Documents/Products/Technical%20Note/NAND%20Flash/tn2975_enable_on-die-ECC_NAND_JFFS2.pdf ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/