On Mon, Apr 08, 2019 at 10:40:15AM +0200, Maxime Ripard wrote: > On Mon, Apr 08, 2019 at 09:41:47AM +0200, Miquel Raynal wrote: > > In the current state, A33 NAND controllers use PIO during > > transfers. Throughput can be increased thanks to the use of DMA > > (mostly during reads, because of the ECC pipelining feature). > > > > Besides the usual addition of DMA DT properties, because the A33 > > NAND DMA handling is different than for older SoCs, we must also > > update the compatible which has recently been introduced for this > > purpose. > > > > Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx> > > Applied, thanks! > > The rest is > Acked-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxx> Actually, the A23 was introduced before the A33, so we want to use that in the compatible. I've updated the patch while applying it, you might want to do the same. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
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