Re: Prevent Nand page writes on Power failure

[Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>]

On Thu, 21 Feb 2019 11:17:47 +0100
Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> wrote:

> Hi Boris,
> 
> On Thu, Feb 21, 2019 at 09:10:55AM +0100, Boris Brezillon wrote:
> > Hi Sascha,
> > 
> > On Wed, 20 Feb 2019 14:58:20 +0100
> > Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> wrote:
> >   
> > > Hi All,
> > > 
> > > I have hardware here for which the normal way to turn off is just to cut
> > > the power. When the powercut happens during a NAND page write then we
> > > get more or less completely written pages during next boot. Very rarely
> > > it seems to happen that such a half written page with only very few
> > > flipped bits is erroneously detected as empty and written again which
> > > then results in ECC errors when reading the data.  
> > 
> > This should definitely be fixed, maybe by lowering the bitflip
> > threshold when doing the empty check. Do you know the ECC strength and
> > the number of bitflips you have when that problem occurs?  
> 
> The problem is that these half written pages do not seem to be very
> stable. It happens that the number of bitflips change with each read.
> I have seen pages which can be read sometimes and sometimes not. It
> really seems that half written pages must be avoided entirely.

But when they are correctly read, do you know how many bitflips they
have? To be honest, I fear not all users will be able to be informed
that powercuts are about to happen, and we need a way to fix that for
everyone.

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