On Thu, 2019-02-07 at 23:50 +0000, Sobon, Przemyslaw wrote: > CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. > > > Hi Ikegami, > > I have seen a case myself where a value was written, chip changed > state to "ready" but when I was reading the value was incorrect. > This can happen as result of intermittent issue with flash. It is > hard to fall into scenario when testing on limited number of devices > but with large enough population you can see that. Another situation > is when a flash chip reaches its maximum number of writes. So for > example a chip is designed for 100k writes to a page. Once you > reach that number of writes you can have invalid data written to > flash but chip itself reports everything was good and switches to > "ready" state. This makes perfekt sense but the AMD flash control I/F does not. You will find that trying to do advanced things with "toggle" bits is very hard. Especially when you also need to scale it to interleaved flashes. I think the odd delay when flash fails is quite OK. If you want to fix this you need to move the other control I/F(which mimics what Intel has) Jocke ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/