Hi Tudor,
On 7.02.2019 11:16, Tudor.Ambarus@xxxxxxxxxxxxx wrote:
Hi, Ahmet,
On 02/07/2019 07:43 AM, A. Celenk wrote:
From: "Ahmet Celenk" <ahmet.celenk@xxxxxxxxxxxx>
Due to two different versions (S25FL128SAGBHI200 and S25FL128SAGBHI210) of
the s25fl128s qspi memory, the single "s25fl128s" device entry must be
split into two to match the correct JEDEC ID's for each version. Solves
paging related issues of S25FL128SAGBHI210 chips.
Signed-off-by: Ahmet Celenk <ahmet.celenk@xxxxxxxxxxxx>
Cc: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxxxxxxx>
Cc: Marek Vasut <marek.vasut@xxxxxxxxx>
---
V3: Added missing SPI_NOR_DUAL_READ flags to new entries
V2: Removed the old s25fl128s entry
drivers/mtd/spi-nor/spi-nor.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 6e13bbd..3cd9052 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1891,7 +1891,8 @@ static const struct flash_info spi_nor_ids[] = {
{ "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },
{ "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },
- { "s25fl128s", INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+ { "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+ { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
The patch is good, there are few nitpicks however. Would you please fix them?
When running checkpatch I get:
$ ./scripts/checkpatch.pl --strict
V3-mtd-spi-nor-split-s25fl128s-into-s25fl128s0-and-s25fl128s1.patch
WARNING: line over 80 characters
#43: FILE: drivers/mtd/spi-nor/spi-nor.c:1894:
+ { "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64, SPI_NOR_DUAL_READ |
SPI_NOR_QUAD_READ | USE_CLSR) },
The spi-nor.c file has lots of over-80-characters lines,
WARNING: line over 80 characters
#44: FILE: drivers/mtd/spi-nor/spi-nor.c:1895:
+ { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_DUAL_READ |
SPI_NOR_QUAD_READ | USE_CLSR) },
Please choose the following format, it has fewer lines:
{ "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64,
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
{ "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256,
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
While here, would you please place these 2 entries in alphabetical order? They
belong just before "s25fl256s0" entry.
Also the rest of entries seems not to be in alphabetical order.
Thanks!
ta
I can handle the whole code for 80 column fitting and alphabetical
ordering later. For now, would you still like me to apply you requests?
But it may look weird in the rest of the code.
Thanks,
Ahmet
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